QM_Spartan-7 Development Board User Manual V01
Below image shows the JTAG connection between Xilinx USB platform cable and QM_Spartan-7 development
board:
Figure 2-3. JTAG Connection and Power Supply
Once the FPGA test program is correctly 【Synthesized】, 【Implemented】 and 【Generated with
Bitstream】, users may click the 【Open Target】 option to connect the XC7S15 FPGA.
Figure 2-4. Vivado to Connect FPGA
TMS (Green)
TDI (Purple)
TDO (White)
TCK (Yellow)
GND (Black)
VREF (Red)
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