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Quectel SC20 Series - Page 46

Quectel SC20 Series
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Smart Module Series
SC20_Series_Hardware_Design 45 / 133
UART1 provides 1.8 V logic level. A level translator should be used if your application is equipped with a
3.3 V UART interface. A level translator TXS0104PWR provided by Texas Instruments is recommended.
The following figure shows the reference design.
VCCA VCCB
OE
A1
A2
A3
A4
GND
B1
B2
B3
B4
LDO5_1V8
UART1_RTS
UART1_RX
UART1_CTS
UART1_TX
RTS_3.3V
RXD_3.3V
CTS_3.3V
TXD_3.3V
VDD_3.3V
TXS0104EPWR
C1
100 pF
C2
U1
100 pF
Figure 15: Reference Circuit with Level Translator Chip (for UART1)
The following figure is an example of connection between the module and PC. A voltage level translator
and a RS-232 level translator chip are recommended to be added between the module and PC.
Figure 16: RS-232 Level Match Circuit (for UART1)
If unused, keep these pins
open.
UART2_RX 93 DI
UART2 receive;
Debug port by default
1.8 V power domain.
If it is unused, keep it open.
UART2_TX 94 DO
UART2 transmit;
Debug port by default

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