Renesas RL78/G13 - Specification Details

RL78/G13 Handshake-based SPI Master Transmission/Reception
R01AN6883EJ0100 Rev.1.00 Page 8 of 38
June.15.23
1.5 Specification Details
After completion of initialization, this sample code selects a slave, checks that slave’s status, and then
transmits and receives data, switches slaves, and repeats the same operation.
(1) Initialize the port.
<Conditions for setting the port>
 Use P52 controlling the CS1 signal as an output port to output a high-level signal.
 U
se P53 controlling the CS2 signal as an output port to output a high-level signal.
 Use P54 detecting the BUSY signal as an input port.
(2) Initialize the timer.
<Conditions for setting the timer>
 Run Channel 3 as two 8-bit interval timers.
 Set the operating clock frequency to 125 kHz (derived by dividing fCLK by 256).
 Use the upper TM03H as a 1-ms interval timer.
 Use the lower TM03 as a 16-µs interval timer.
 Set the priority of the interrupts (INTTM03H, INTTM03) to the lowest level (3, by default).
(3) Initialize the CSI.
<Conditions for setting the CSI>
 Use SAU0 channel 0 as CSI00.
 Use CK00 as the transfer clock.
 Assign the clock output to the P10/SCK00 pin, the data input to the P11/SI00 pin, and the data output
to the P12/SO00 pin.
 Use single transfer mode as the transfer mode.
 Set the data length to 8 bits.
 Set the phase between the data and clock to type 1.
 Set the order of data transfer mode to MSB first.
 Set the transfer rate to 1 Mbps.
 Use transmission end and reception end interrupts as the interrupt (INTCSI00).
 Set the priority of the interrupt (INTCSI00) to the lowest level (3, by default).