Renesas RL78/G13 - INICSI00 Interrupt Processing

RL78/G13 Handshake-based SPI Master Transmission/Reception
R01AN6883EJ0100 Rev.1.00 Page 31 of 38
June.15.23
5.6.13 INICSI00 interrupt processing
Figure 5-14 shows the flow of INICSI00 interrupt processing.
Figure 5-14 INICSI00 interrupt processing
R_CSI00_Interrupt
()
return
gp_csi00_tx_address
←
gp_csi00_tx_address + 1
g_csi00_tx_count
← g_csi00_tx_count -
1
No
Read receive data
*
gp_csi00_rx_address ← SIO00
register
gp_csi00_rx_address
←
gp_csi00_rx_address + 1
*
gp_csi00_rx_address
← SIO00 register
Yes
No
SIO00 register
←
*
gp_csi00_tx_address;
Set value of overrun detection
flag in err_type
Clear error flag
Overrun error has occurred?
Number of transmit data?
Read receive data
Receive data pointer + 1
Set transmit data
Transmit data pointer + 1
Number-of-transmit-
data counter - 1
Number of transmit data = 0?
Yes
Less than 1
1 or more