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Roland SDE-3000 Service Notes
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SDE-100073000
FEB.
5,1984
PEAK
HOLD
&
COMPARATOR
(ICs
6
and
7)
The
positive
and
negative
peaks
of
a
samped
signal
are
peak-held
and
detected
at
IC6
and
IC7
respectively,
resulting
in
a
logic
code
as
shown
in
the
table
below.
The
code
is
latched
into
IC33
at
SAH
rate,
passes
through
IC34
(data
selector)
on
"L"
DB5
(A/D
cycle),
and
through
ICs
35C
and
D
and
reaches
pins
6
and
9
of
IC10
D/A
attenuator.
IC10
switches
ON
or
OFF
its
analog
gates
to
provide
for
correct
D/A
output
level.
This
logic
code
is
also
sent
through
IC33
to
companding
RAMs
IC41
and
IC43
while
A/Ded
input
signal
data
is
sent
from
comparator
IC8
to
RAM
board
via
IC31.
In
other
words,
audio
input
is
stored
into
two
locations
with
different
information
separated—meter's
pointer
deflection
reading
into
IC1—
IC12
on
the
RAM
board,
and
meter
range
into
companding
RAMs.
COMPANDING
RAMs
(IC41
and
43)
As
shown
in
the
Main
Controller
Timing
Chart
(see
RAM1-RAM3)
and
RAM
table,
A/D
data
for
a
sampled
signal
is
stored
into
three
RAMs
(in
the
same
R'S
section)
four
times
starting
from
MSB
3
bits
(D11-D9).
On
the
contrary,
companding
data
is
stored
into
IC41
and
IC43
once
for
the
signal.
However,
since
the
same
addresses
are
used
for
both
RAM
groups,
companding
RAMs
cannot
make
use
of
the
remaining
three
addresses
if
suit
able
modification
is
made
on
them.
IC31
issues
address-offset
data
from
DBO
and
DB1
to
IC38
and
IC36
(Address
Adder)
which
adds
0
to
3
as
the
memory
banks
change
from
RS16
to
RS32,
RS32
to
RS48
and
so
on.
INPUT
100Hz
IC41
(IC43)
DIN
TP-1
1C41T1C33)
DOUT
When
in
delay
mode
(D/A
cycle,
IC31
DB5=H
and
DB6=L),
companding
data
is
latched
into
IC32
on
rising
edge
of
DB4,
selected
by
IC34
(pin
1=H),
gated
by
IC35C
and
D,
then
routed
to
IG10.
With
this
companding
data
applied
IC10
determines
the
range
of
analog
voltage
from
D/A
converter
IC15
and
IC14,
restoring
RAMs
(IC1-IC12)
stored
data
to
the
original
signal
level.
RAMs
IC1-IC12
on
RAM
BOAHD
As
mentioned
earlier,
during
success
ve
approximation
of
a
sampled
signal,
comparison
results
are
stored
into
th
ee
RAMs,
being
designated
by
RS-,
in
3
bits
parallel
x
4
serial
format
to
represent
the
signal
in
12
bit
data.
RAMs
used
for
storing
are
always
from
those
in
RS16
(ICs
12,
8
and
4)
to
RS64
(ICs
9,
5
and
1)
depending
on
delay
title
settings.
In
short
delay
settings
those
RAMs
of
RS16
are
repeatedly
used
while
those
in
RS64
are
left
out
of
storing.
This
concept
becomes
important
when
troubleshooting
RAMs.
(Refer
to
the
table
on
P.13).
CONTROL
SIGNALS
IN
DIFFERENT
MODES
Irrelevant
to
Power-ON
mute
sue
as
MUTE
A
and
MUTE
B.
All
"0
ing
Power-ON
MUTE
periods.
dur
DIAGNOZING
DELAY
SOUND
-
Isolating
Defective
RAM
-
►For
SDE-1000,
see
para.
5
and
6.
►Also
see
P.22
for
failure
examples.
When
a
trouble
is
found
in
the
delay
sound,
the
circuits
first
to
be
checked
will
be
those
shown
in
the
block
diagram
(Fig. 2,
P.11).
They
are
closely
related
to
each
other.
Of
these,
companding
circuit
effects
to
both
A/D
and
D/A
conversions
and
the
D/A
converter
becomes
a
part
of
A/D
converter
during
A/D
cycle.
However,
the
most
difficult
to
point
out
is
a
RAM
since
14
RAMs
are
involved
in
the
delay
line.
Consequently,
this
section
describes
fault
isolation
procedure
on
the
assumption
that
a
specific
RAM
is
defective.
Before
going
into
RAM
sections,
other
related
circuits
must
be
checked
for
proper
function.
These
checkings
also
give
hints
for
troubleshooting
associ
ated
circuits.
NOTE:
The
number
of
RAM
cells
engaged
in
sound
delay
are
dependent
on
delay
time
and
the
level
of
input
signal
while
companding
circuit
acts
with
changes
in
input
sound
level.
Unless
otherwise
directed
DELAY
TIME
should
be
set
at
the
longest
and
the
input
signal
level
varied
widely
when
checking.
USE
MONITOR
for
help
checking
irregular
sound.
1.
BRIEF
CHECKING
With
relatively
large
signal
applied
to
the
unit's
input
jack,
observe
TP-1
(IC14
pin
6);
Adjust
the
scope
to
display
the
waveform
similar
to
that
in
the
photo
below.
Check
steps
of
A/D
cycle
traces
for
1/2-changes
in
voltage.
If
not,
widely
vary
the
input
level
and
check
whether
companding
circuit
is
ill
affecting.
When
A/D
conversion
seems
defective,
proceed
to
para.
5.
2.
DISCONNECTING
COMPANDING
CIRCUIT
Companding
circuit
affects
to
both
A/D
and
D/A
converters.
Disconnect
the
companding
when
checking
the
both
circuits.
a.
Disolder
and
remove
the
ground
lead
of
R165
connecting
to
pin
6
of
IC10.
b.
Jumper
wire
across
pin
6
of
IC14
(TP-1)
and
pin
2
of
IC8
to
bypass
IC10.
If
companding
circuit
seems
defective,
proceed
to
the
next
para.
12
12
14
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Roland SDE-3000 Specifications
General
Type
Digital Delay
Output Impedance
1 kOhm
Inputs
1/4" phone jack
Outputs
1/4" phone jack
Total Harmonic Distortion
0.05%
Power Supply
AC 117 V
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