Roland SDE-3000 - Page 14

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DIN of IC31
TP-1
Freed from comDandinq effect
3. COMPANDING CIRCUIT
When companding circuit seems malfunctioning, track
the logic code from peak hold output to IC10 (see the
table in "Peak Hold and Comparator" in the Circuit De
scription, SDE-3000). During a tracking the input signal
must be set at a level for unchanged code. Then change
input level for another logic code.
Verify the identical code throughout A/D and D/A
cycles. If a difference exists, check RAMs IC41 and
IC43.
4. ISOLATING RAM GROUPs (RS16-RS64)
When delay time at which defective sound is reproduced
is determined, it is easier to point out the RAM group
containing the ill cell by referring to the table on the
right.
The DELAY DISPLAY can be a great help to measure
the time when abnormal sound occurs on the border of
two RAM groups.
a. With MODULATION OFF, set TIME to the
maximum.
b. Adjust DELAY TIME (X1-X1.5) on the rear panel for
1600ms display.
c. With MODULATION DEPTH "0", push MOD to ON.
d. Re-set TIME to around suspective time. For example,
if a noise pops closely at the middle of the delay
time, set TIME for 800ms. If the noise disappears,
failure may be located anywhere in a RAM of RS48.
Some errors may exist in relationship between the
delay time and the RAM address increment (+1ms).
In this critical case, refer to the next para.
It is difficult to detect failure in lower bits, also proceed
to the next para.
5. ALL "1" & ALL "0" CHECKS
Using sine wave as a test signal has adverse effects, that
is, data in conversion system, RAM memory, etc. vary
status from time to time as the input changes in level.
When DC voltage at constant level is applied as an input
signal, these data bits will stay at "1" or "0" at least for
a certain period.
P.B.HJR.H.
READ/ WRITE POINTER
RS 64 18k WORD
RS 16 16k WORD
I IC36. IC38
Companding
RAMS
IC41. IC43
RS 32 16k WORD
A/D staircase must step by 1/2 in amplitude. If not, or
uncertain because of lower bits, check suspective bit(s)
onD11-D0of IC31.
The waveform (and sound) will be disturbed at the
moment when defective bit is reproduced. Check for
jitter or glitch (pulse) at TP-1. If doubtful, proceed to
para 6.
6. PINPOINTING DEFECTIVE RAM
Set DELAY TIME for 1600ms (see para. 4).
Feed D IN of IC31 with +5V or 0V (para. 5).
Connect scope to the bus of RAMs including suspective
RAM. If the RAM is not defined yet, may have to be re
peated for the other 2 buses.
For confirmation, first disconnect suspective RAM's D
OUT by cutting off the pattern to the bus, then observe
the RAM D OUT directly.
Ideally, this can be accomplished by applying DC volt
ages (of max. or min. that can be accomodated by A/D
system) to the input of the comparator IC8. Alternative
to this is pulling up or down of D IN (IC31 pin 31).
a. Disconnect D42 cathode from TR97 (circuit dia.
F-22).
b. A staircase "A" as shown in the figure will be seen at
TP-1.
c. Connect a length of wire to D42 anode (or DIN of
IC31) and touch the other end of the wire to ground
point. A reversed waveform "B" will appear.
D/A cycle is also inverted when the delay time comes;
its amplitude being equal to that at the end of A/D
cycle.
Oil ,D10.D9, 08. , 06 , D5 , D4 , D3 . D2 , Dl DO
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