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Sankyo STD-1700 - DC Voltage Block Diagram; MPX Filter Adjustment; Bias Oscillator Frequency Setting; Head Azimuth Adjustment

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6.3
DC
voltage
block
diagram
DC
VOLTAGE
DIAGRAM
(Unit:
Volt)
17.3V
@
@
(41.7
V)
iJ
Power
trans.
6.4
MPX
filter
Apply
a
signal
of
400
Hz-20
dB
to
the
LINE
IN
terminals
and
adjust
the
RECORD
LEVEL
control
until
an
output
of
-2:5
dB
is
obtained
from
the
LINE
OUT
terminals
(with
the
OUTPUT
LEVEL
control
at
maximum).
Then
apply
a
signal
of
19
kHz
-20
dB
to
the
LINE
IN
terminals
and
adjust
L502
for
minimum
output.
600
2
600
2
LINE
IN
LINE
OUT
6
=
6.5
Bias
oscillator
frequency
Connect
a
frequency
counter
to
the
terminals
of
the
erase
head
and
adjust
the
oscillator
block
to
an
oscillating
frequency
of
80
kHz
+
5
kHz.
Erase
Head
Counter
6.6
Head
azimuth
Play
back
the
test
tape
(MTT-114)
and
adjust
for
maximum
output.
OSCILOSCOPE
Adjsuting
Nut
2
Side
1
DECK
under
Test
Head
Phase
Check
Setup
|
Head
Azimuth
Adjustments
Location
13

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