Sanlien Palert - Ai Registers

USER MANUAL
Version 2 17/11/2017
© Jenlogix 2017 Jenlogix
Page 39 of 40
7.2 AI REGISTERS
UNIT Modbus AI Address Mapping Table (300XXX)
Register Description
Note
100 event
101 Intensity now
0 ~ 7
102 PGA now
0.1gal
103 Triggered Palerts
[bit map]
104 Digital output status
[bit map]
105 Digital input status
[bit map]
106 System time in year
107 System time in month
108 System time in day
109 System time weekday
110 System time in hour
111 System time in minute
112 System time in second
113 Event time in year
114 Event time in month
115 Event time in day
116 Event time in weekday
117 Event time in hour
118 Event time in minute
119 Event time in second
120 connection status of Palert 0~4
[bit mapping]
121 connection status of fted04 0~4
[bit mapping]
122 connection status of board 0~4
[bit mapping]
123 connection status of ba host
[bit mapping]
High nibble for zt2000
Low nibble for ba host