Sanyo DC - C BLOCK DIAGRAM (CD); IC105 SM5870 DS (D;A Converter); IC106 XRA15218 F (Dual Operational Amplifier)

“i
C BLOCK DIAGRAM (CD)
.CI05 SM5870DS (D/A Converter)
-m
1
4
5
6
7
8
-iii
*
Xvss
CKSLN
CKO
o
T
TSTN
NODN
ATTN
Ii
12
=4+
LRCI
DIN
-1
OFS1 I
DFS2
FUNCTION No. PIN NAME
1/0
id}JCTION
Output Terminal of Oscillation
MOTEO
o
Output of nflnity Zero Detector
GND Terminal of Crystal Route (OV)
14 RSTN
i
System Reset
Frequency Select of XTI, CKO
H =
Normal, L= Reset
Oscillation Part, Output of Clock
Digital GNU Terminal (OV)
Test Terminal
16 DVOD
H = Normal, L= Test Mode
Digital VDD Terminal (5V)
Analog VDD Terminal 1 (5V)
o
‘
PWM Output of L-channel (+)
Analog GND Terminal 1 (OV)
o
PWM Output of L-channel (-)
Analog VDD Terminal 2 (5V)
Sample rate (fs) Clock of Input Data
Analog VDD Terminal 3 (5V)
H = L-ch L = R-ch
Bit Clock of Input Data
: 2E;i:3;) ~~~
VDD Terminal of Crystal Route (5V)
Input Terminal of Oscillation
I
2 ~
I
De-Emphasis On De-Emphasis On
48.OkHz
32.0k Hz
z z
E
g$
z
y
z
z
1-
INFINITY ZERO
FILTER OPERATIONAL &
ATTENTION OPERATIONAL
BLOCK
‘-n
XTO
;0
28
xl 1
Xvss
27. xvUl
CXStN 3 26. AWXM
cxO .4.- -Z5. m
TSTN 5
2A
AV?,S4
KU-6 23. RON
ATTN 7
22
AVCC13
ICIOG
au=
LiW1 8 21 avUx2
5CK1 9 20
L~
DIN 10
19
AVSS 1
Cfsl II 18 LO
ffs2 12 17 A-l
wTEO 13
RSTN 14
0:: : ~
XRA15218F (Dual Operational Amplifier)
I I
1
RSTN !4
DvSS 15
C2VOD 16
I
L
R
TIMING
CONTROL
●
NOISE SHAPER“
L
OPERATIONAL
PWM OATA
BLOCK
OSC BLOCK
R
—
a
..
/
I
I I
l-..-J-
1
Fd
VOUT1 1 8 Vcc
-+
V] N-l
2
7
VOUT
2
V]N+l 3
+-
6 V] N-2
‘EE 4 5 ‘1N+2
-23-
)CKO
)CKSLN
)Xvss
1
XTO
1x11
)xvDD
)AvOD4
.,
.’, .:
“.,
-.