Sanyo DP55360 - Page 36

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IC BLOCK DIAGRAMS (CONT.)
INTERRUPT
OSCILLATOR
OUT_DDC
OUT_DOC_DATOUT_DDC_DAT
OUT_DDC_CLK
XTAL_IN
INT_N/HP_CTRL
I2C_SDA/SEL1
I2C_SCL/SEL0
MODE
PD
OUT_D2+
OUT_D2–
OUT_D1+
OUT_D1–
OUT_D0+
OUT_D0–
OUT_C+
OUT_C–
XTAL_OUT
DDC
SWITCH
BUFFER
RXA_C+
RXA_C–
RXA_D0+
RXA_D0–
RXA_D1+
RXA_D1–
RXA_D2+
RXA_D2–
RXB_C+
RXB_C–
RXB_D0+
RXB_D0–
RXB_D1+
RXB_D1–
RXB_D2+
RXB_D2–
RXC_C+
RXC_C–
RXC_D0+
RXC_D0–
RXC_D1+
RXC_D1–
RXC_D2+
RXC_D2–
RXB_C+
RXB_C–
RXD_D0+
RXD_D0–
RXD_D1+
RXD_D1–
RXD_D2+
RXD_D2–
RXA_5V
RXA_HPD
RXA_DDC_DAT
RXA_DDC_CLK
RXB_5V
RXB_HPD
RXB_DDC_DAT
RXB_DDC_CLK
RXC_5V
RXC_HPD
RXC_DDC_DAT
RXC_DDC_CLK
RXD_5V
RXD_HPD
RXD_DDC_DAT
RXD_DDC_CLK
RT AND EQ
RT AND EQ
RT AND EQ
HDMI
SWITCH
DDH(3V3)
TDA9996
DDH(1V8)
V
V
EQ
EQ
EQ
REGULATOR,
EDID AND HP_CTRL
REGULATOR,
EDID AND HP_CTRL
REGULATOR,
EDID AND HP_CTRL
REGULATOR
HP_CTRL
EDID
I C-BUS
STAND-ALONE
POWER-DOWN
2
DD(sub)(3V3)
V
DDDC(1V8)
V
IC6600, HDMI SELECTOR