Sharp CE-121 - Page 10

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HA: Clock frequency for the counter. This signal is counted and decoded to perform s y nchroni -
zation with the comman signal , Hl-H7 , generated from the CPU II .
DSIP: With high level of this signal , processing of display operation is indicated (RAM data
designated by Hl-H8 is sent out on SI -S40).
The data stored in the display buffer is carried th rough SI-S40 (Fig . 2-3 - 2) to be fed t o the LCD.
(To indicat e "4 " on the dis p lay , H4 and HS ar e engag ed for SI , H3 and H S for S 2, etc . , all the same
throughout S6-S40 . )
F ig 2 - 3 - 2
S 2
Sl
H7
H6
LJl....____flJ
L I
H 5
LJ
H 4
H3
H 2
Hl
----------- -------- - -- GND
-- --- VA
--------. -----------Vs
-- - - - - - - Vn1 S P
HA
DI SP 0. 5 ms
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