9
F
i
g
2
-
3
-1
The
numeri
ca
figure
"
4
", to be displayed by the CPU
II
,
is
c
onverted into the
r
ele
v
ant character
code and carried through on the address data bus
.
First of
all
,
the segment Sl
is
selected with the
address
A8-Al "
00000000" to
s
tore the data DI04-DI01
"1000
"
in
t
he display buffer
(see
Fi
g
.
2-3-1
). To store second half 4 bits of the
data
,
only
AS
in the address in
t
urned
"
1
" to make the
address "00010000" to store data
"
0001 ". In the same
manner
,
the address "00000001"
is
selected
for storing the first half
4
-
bit data
"O
100" for he segment S2 and the
se
c
ond half 4
-
bit data
"
000
I
"
is
stored with the address "00010001 ".
S40
S32
S3
3
S34
Sl6
Sl7
Sl
8
1
S2
A5=0
A5=1
DI04 DI02 DI04 DI02
'--------..,..-~
Addr
es
s
0
1
0
0 0
)
F
0
1
0 0
1
)
F
0
1
0
1
0
~
F
Al
I
A8
A7
A6 A4
Hl
DDD•D
H2
oo••
o
H3
o•o•
o
H4
•oo•o
H
5
•••••
H6
ooo•o
H7
ooo•o
Sl
S2
S
3
S4 S5
Ex
:
Displaying numerical figure
"4"
There are
8
x
40=320 bits
(
40 bytes)
of area in the display buffer in the
display chip.
D
is
p
lay
b
u
ffer
XOOl 0100
H8 H7 H6 H5 H4 H3 H2
Hl
X
OOl 1000
Co
unter/
decoder
HA
T
he con
t
ents of
di
sp
lay
ind
i
cated by
t
he CPU
I is
receiv
e
d
by the
C
P
U
II
via the input buffer and
m
akes converte
d
into
respecti
ve
character cod
e
s,
then they are carried over to the display buffer in
t
he
di
sp
lay
chi
p through
t
he address data
bus
.
•
D
es
i
gnatio
n of the display
d
ata
Th
e
followin
g
struct
u
re is
observed in the display buffer in the display
chip
.
2-3. Display
the
ata.
'U
I
up
f
er
,
.in
v
d
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