Sharp DV-600S - VCD and CD Playback

DV-600S
DV-600H
31 MRST Input Reset signal
32 VSS – Digital GND
33 VDD – Digital power +3.3V
34 PXDO (0) Output Pixel data output
35 PXDO (1) Output
8-bit parallel video data conforming to ITU-R BT.601 and BT.656 standard (Cb/Y/Cr/Y)
36 PXDO (2) Output MSB=PXDO(7), LSB=PXDO(0)
37 PXDO (3) Output
38 PXDO (4) Output
39 PXDO (5) Output
40 VSS – Digital GND
41 VDD – Digital power +3.3V
42 PXDO (6) Output
43 PXDO (7) Output
44 PXCLKO Output Reference clock output for pixel data. 27 MHz
45 VSYNCO Output Vertical sync signal output
46 HSYNCO Output Horizontal sync signal output
47 VSYNCI Input Vertical sync signal output
48 VSS – Digital GND
49 VDD – Digital power +3.3V
50 HSYNCI Input Horizontal sync signal output
51 PXCLKI Input Reference clock output for pixel data. 27 MHz
52 PXDI (0) Input Pixel data output
53 PXDI (1) Input
8-bit parallel video data conforming to ITU-R BT.601 and BT.656 standard (Cb/Y/Cr/Y)
54 PXDI (2) Input MSB=PXDI(7), LSB=PXDI(0)
55 PXDI (3) Input
56 VSS – Digital GND
57 VDD – Digital power +3.3V
58 PXDI (4) Input
59 PXDI (5) Input
60 PXDI (6) Input
61 PXDI (7) Input
62 TEST0 Input Test terminal
63 TEST1 Input Test terminal
64 VSS – Digital GND
Terminal
Terminal name In/Output Function
• Block Diagram
12
HADAT
PXDI
HSYNCI
HADR HCS HAS HWR HRD HIM MRST
VDD
VSS
TEST0
TEST1
INT
WAIT
PXDOVSYNCOHSYNCO
PXCLKI
VSYNCI
PXCLKO
64pin LQFP
18
8
8
81
1
1
111 11
15
10 11
27
21 29 28 27 26 30 31
19
8
17
16
25
24 32
33
41
40 48
49 57
56 64
62
63
22
23
3934
43
4546
42
44
51
47
50
55 61
52 58
CPU
Host interface
ITU-R
601/656
interface
ITU-R
601/656
formatter
Timing
generation
Clock
Gen.
Source
Dec.
NTSC Enc.
(3ch D/A built in)
Edge
creation
SPT circuit
Digital
dinamic
r circuit
Digital color correction
Color
offset
correction
White
correction
DR-SPT
circuit
8
11
1
1
11-10