Sharp HT-DV40H - Page 100

HT-DV40H
8 – 15
GPIO/M_DD[26] 158 Input/Output SDRAM data bus bit 26 or GPIO[35]
GPIO/M_DD[25] 159 Input/Output SDRAM data bus bit 25 or GPIO[36]
GPIO/M_DD[24] 160 Input/Output SDRAM data bus bit 24 or GPIO[37]
Symbol Pin # Input/Output Description
Priority selection Function Dir
hw_cfg_chg[5]=1íb1 SDRAM data bus [26]
Input/Output
gpio_first[2][3] = 1 GPIO[35]
Input/Output
hw_cfg_chg[4] = 1'b1 FL_ROM_DATA[10]
Input/Output
sft_cfg2[7:6] = 1 UA0_DTR_B
Output
sft_cfg13[14:12] = 3'b001 AT_D[2]
Input/Output
sft_cfg13[14:12] = 3'b100 AT_D[2]
Input/Output
sft_cfg0[13:12] = 1 TV_LCD_R[5]
Output
sfg_cfg15[2:0] = 3'b100 FM_GPIOB[2]
Input/Output
sfg_cfg16[7:4] = 4'b0101 FM_GPIOB[9]
Input/Output
sfg_cfg17[11:8] = 4'b0001 FM_GPIOB[22]
Input/Output
sfg_cfg18[3:0] = 4'b1001 FM_GPIOB[31]
Input/Output
(other) GPIO[35] (default)
Input/Output
Priority selection Function Dir
hw_cfg_chg[5]=1íb1
SDRAM data bus [25] Input/Output
gpio_first[2][4] = 1 GPIO[36] Input/Output
hw_cfg_chg[4] = 1'b1 FL_ROM_DATA[9] Input/Output
sft_cfg2[7:6] = 1 UA0_RI_B Input
sft_cfg13[14:12] = 3'b001 AT_D[12]
Input/Output
sft_cfg13[14:12] = 3'b100 AT_D[13] Input/Output
{sft_cfg20[5:3],sft_cfg14
[15:13]} = 6'b000011
INT0_7
Input
sft_cfg0[13:12] = 1 TV_LCD_G[0] Output
sfg_cfg16[15:12] = 4'b0100 FM_GPIOB[13] Input/Output
sfg_cfg17[11:8] = 4'b0001 FM_GPIOB[21] Input/Output
(other) GPIO[36] (default) Input/Output
Priority selection Function Dir
hw_cfg_chg[5]=1’b1
SDRAM data bus [24] Input/Output
gpio_first[2][5] = 1 GPIO[37] Input/Output
hw_cfg_chg[4] = 1'b1 FL_ROM_DATA[8] Input/Output
sft_cfg2[7:6] = 1 UA0_DCD_B Input
sft_cfg13[14:12] = 3'b001 AT_D[3]
Input/Output
sft_cfg13[14:12] = 3'b100 AT_D[3] Input/Output
sft_cfg1[11:9] = 3'b011 INT1_11
Input
sft_cfg0[13:12] = 1 TV_LCD_G[1] Output
sfg_cfg15[2:0] = 3'b100 FM_GPIOB[3] Input/Output
sfg_cfg17[7:7] = 4'b0001 FM_GPIOB[20] Input/Output
(other) GPIO[37] (default) Input/Output