Sharp LC-40LX630E - 8.3 Diagram NANDflash - conditional access B02 A, PNX855 xx (IC7 S00)

78
LC-32LE63x
LC-40LE63x
LC-46LE63x
8.3 Diagram NANDflash - conditional access B02A, PNX855xx (IC7S00)
Figure 8-3 Internal block diagram and pin configuration
18770_308_100217.eps
100217
Block diagram
Pinning information
TS out/in for
TS input
CVBS, Y/C,
LVD S for
analog CVBS
SPDIF
Low-IF
SSIF, LR
HDMI
CI/CA
MPEG
PRIMARY
LVD S
VIDEO
SECONDARY
MEMORY
VIDEO
3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
450 MHz
500 MHz
I
2
C
PWM
Px_x IR ADC UART I
2
C GPIO Flash
analog audio
I
2
S
SPDIF
SYSTEM
USB 2.0
PNX8550x
DVB-T/C
channel decoder
DVB
AV-PIP
SPI
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
MULTI-
STANDARD
VIDEO
DECODER
24KEf CPU
MIPS32
x 10
AV-DSP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
quad channel)
(single, dual or
flat panel display
DRAWING
ENGINE
Scatter/Gather
TS Demux
Motion-accurate
pixel processing
SD
Memory
Card
Ethernet
MAC
analog Y/C
Direct-IF
PNX8550xE
Transparent top view
2468 10 12
13
14
15 17
16
19
18 20
21 23
22 24
25
26
1 3 57911
ball A1
index area
AB
AD
AA
AC
Y
W
V
U
R
N
T
P
M
L
K
J
H
F
D
G
E
C
B
A
AF
AE
IC Data Sheets (continued)