Sharp LC-52D82U - Page 73

LC-46D82U/LC-52D82U
5 – 4
14 GO1_FI I Green Data Signal Input (ODD) P1
15 VCCIO1 - Power Supply 3.3V R1
16 GND - Ground T1
17 VCCIO4 - Power Supply 3.3V T2
18 IVSO_FI I Vertical Sync Signal Input (ODD) T3
19 SCL_FO I/O SCL Signal Output for I2C T4
20 BE7_FO O Blue Data Signal Output (EVEN) T5
21 BE6_FO O Blue Data Signal Output (EVEN) T6
22 BE4_FO O Blue Data Signal Output (EVEN) T7
23 BE1_FO O Blue Data Signal Output (EVEN) T8
24 GE7_FO O Green Data Signal Output (EVEN) T9
25 GE3_FO O Green Data Signal Output (EVEN) T10
26 RE9_FO O Red Data Signal Output (EVEN) T11
27 RE6_FO O Red Data Signal Output (EVEN) T12
28 RE4_FO O Red Data Signal Output (EVEN) T13
29 RE2_FO O Red Data Signal Output (EVEN) T14
30 VCCIO4 - Power Supply 3.3V T15
31 GND - Ground T16
32 VCCIO3 - Power Supply 3.3V R16
33 BO8_FO O Blue Data Signal Output (ODD) P16
34 BO4_FO O Blue Data Signal Output (ODD) N16
35 BO1_FO O Blue Data Signal Output (ODD) M16
36 GO6_FO O Green Data Signal Output (ODD) L16
37 GO3_FO O Green Data Signal Output (ODD) K16
38 CLK7 - Pin for Clock J16
39 CLK4 - Pin for Clock H16
40 RO5_FO O Red Data Signal Output (ODD) G16
41 RO3_FO O Red Data Signal Output (ODD) F16
42 RO1_FO O Red Data Signal Output (ODD) E16
43 IVS_FO O Vertical Sync Signal Output D16
44 Reserved C16
45 VCCIO3 - Power Supply 3.3V B16
46 GND - Ground A16
47 VCCIO2 - Power Supply 3.3V A15
48 RE5_FI I Red Data Signal Input (EVEN) A14
49 RE8_FI I Red Data Signal Input (EVEN) A13
50 GE5_FI I Green Data Signal Input (EVEN) A12
51 GE9_FI I Green Data Signal Input (EVEN) A11
52 BE7_FI I Blue Data Signal Input (EVEN) A10
53 IHSE_FI I Horizontal Sync Signal Input (EVEN) A9
54 DEIE_FI I Data Enable Signal Input (EVEN) A8
55 GE3_FI I Green Data Signal Input (EVEN) A7
56 GE0_FI I Green Data Signal Input (EVEN) A6
57 BE1_FI I Blue Data Signal Input (EVEN) A5
58 RST I RESET Signal (RESET at Lo) A4
59
SDA_FI I/O SDA Signal for I2C (Main PWB FPGA) A3
60 VCCIO2 - Power Supply 3.3V A2
61 GND - Ground B2
62 RO5_FI I Red Data Signal Input (ODD) C2
63 Reserved D2
64 GO7_FI I Green Data Signal Input (ODD) E2
65 TCK I Inline Program JTAG TMS F2
66 TDO I Inline Program JTAG Clock G2
67 ICKE_FI I Pixel Clock Input (EVEN) H2
68 ICKO_FI I Pixel Clock Input (ODD) J2
69 BO6_FI I Blue Data Signal Input (ODD) K2
70 RO2_FI I Red Data Signal Input (ODD) L2
71 BO2_FI I Blue Data Signal Input (ODD) M2
72 GO0_FI I Green Data Signal Input (ODD) N2
73 BO0_FI I Blue Data Signal Input (ODD) P2
74 GND - Ground R2
75 IHSO_FI I Horizontal Sync Signal Input (ODD) R3
76
SDA_FO I/O SDA Signal for I2C (FPGA IXB857WJ) R4
77 BE8_FO O Blue Data Signal Output (EVEN) R5
78 Reserved R6