Sharp MD-E9000H - Page 89

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MD-E9000H
1 VSSA (ADC) AD converter analog ground.
2 VDDA (ADC) AD converter analog power.
3 VINL AD converter input. (left)
4 VREF (A) AD converter reference voltage.
5 VINR AD converter input. (right)
6 VADCN AD converter reference voltage N.
7 VADCP AD converter reference voltage P.
8* MC1 Mode control 1. (Pulled-down)
9* MP1 Multipurpose pin 1.
10 VDDD Digital power.
11 VSSD Digital ground
12 SYSCLK System clock 256 fs, 384 fs, 512 fs.
13 MP2 Multipurpose pin 2 .
14 MP3 Multipurpose pin 3 .
15 MP4 Multipurpose pin 4 .
16 BCK Bit clock input.
17 WS Word select input.
18 DATAO Data output.
19 DATAI Data input
20* MP5 Multipurpose pin 5. (Pulled-down)
21* MC2 Mode control 2. (Pulled-down)
22 VSSA (DAC) DA converter analog ground.
23 VDDA (ADC) DA converter analog power.
24 VOUTR DA converter output. (right)
25 VDDO Opeamp power.
26 VOUTL DA converter output. (left)
27 VSSO Opeamp ground.
28 VREF (D) AD converter reference voltage.
IC1701 VHiUDA1345/-1: AD/DA Converter (UDA1345)
Pin No. Function
Terminal Name
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Figure 89 BLOCK DIAGRAM OF IC
V
DDA(ADC)
V
SSA(ADC)
V
ADCP
V
ADCN
V
ref(A)
VINR
MC1
MC2
MP5
MP2
MP3
MP4
SYSCLK
VOUTR
Vref(D)
V
SSA(DAC)
V
DDA(DAC)
V
SSO
V
DDO
VOUTL
MP1
DATAI
WS
BCK
DATAO
V
SSD
V
DDD
VINL
ADC
0dB/6dB
switch
ADC
DECMATION FILTER
DC-CANCELLATION FILTER
DIGITAL
INTERFACE
L3-BUS
INTERFACE
DSP FEATURES
INTERPOLATION FILTER
NOISE SHAPER
DAC DAC
2
3
4
5
1 7
8
9
6
12
13
14
15
11
17
18
19
10
16
22
23
24
25
21
27
28
20
26