Counter Instructions
46
S7-400 Instruction List
A5E00267845-01
Counter Instructions, continued
tion
Address ID Description
Words
CPU 412 CPU 414 CPU 416 CPU 417
CD Cf
C [e]
Decrement counter by 1 on edge
change from “0” to “1”
1
1)
/2 0.2
0..2+
0.12
0.2+
0.08
0.08+
0.06
0.06+
FR Cf
C [e]
Enable counter on edge change
from “0” to “1” (reset edge bit
1
1)
/2 0.2
0.2+
0.12
0.12+
0.08
0.08+
0.06
0.06+
Counter para.
counting and setting the counter)
2 0.2+ 0.12+ 0.08+ 0.06+
Status word for: CD, FR BR CC1 CC0 OV OS OR STA RLO /FC
Instruction evaluates: – – – – – – – Yes –
Instruction affects: – – – – – 0 – – 0
+ Plus time required for loading the address of the instruction (see page 20)
1)
With direct instruction addressing Counter No.: 0 to 255