Interrupts/diagnostics alarms
6.2 Interrupts and diagnostics
CPU 1512C-1 PN (6ES7512-1CK00-0AB0)
Manual, 09/2016, A5E35306440-AB
127
Hardware interrupts when using the high-speed counters
Table 6- 14 Hardware interrupts and their meaning
Opening of the internal gate (gate
1 When the internal gate is opened, the technology function triggers a
hardware interrupt in the CPU.
Closing of the internal gate (gate
stop)
2 When the internal gate is closed, the technology functions trigger a
hardware interrupt in the CPU.
Overflow (high counting limit violat-
3 When the count value exceeds the high counting limit, the technology
function triggers a hardware interrupt in the CPU.
Underflow (low counting limit vio-
4 When the count value falls below the low counting limit, the technology
function triggers a hardware interrupt in the CPU.
Comparison event for DQ0 oc-
curred
5 When a comparison event for DQ0 occurs due to the selected compari-
son condition, the technology function triggers a hardware interrupt in
the CPU.
When the change of the count value for an incremental or pulse encoder
was not caused by a count pulse, the technology function does not trig-
ger a hardware interrupt.
Comparison event for DQ1 oc-
curred
6 When a comparison event for DQ1 occurs due to the selected compari-
son condition, the technology function triggers a hardware interrupt in
the CPU.
When the change of the count value for an incremental or pulse encoder
was not caused by a count pulse, the technology function does not trig-
ger a hardware interrupt.
Zero crossing 7 At a zero crossing of the counter or position value, the technology func-
tion triggers a hardware interrupt in the CPU.
New Capture value present
1)
8 When the current counter or position value is saved as a Capture value,
the technology function triggers a hardware interrupt in the CPU.
Synchronization of the counter by
9 At the synchronization of the counter by an N signal or edge at DI, the
technology function triggers a hardware interrupt in the CPU.
Direction reversal
2)
10 When the count value or position value changes direction, the technolo-
gy function triggers a hardware interrupt in the CPU.
Can only be set in counting mode
Feedback bit STS_DIR is preset to "0". When the first count value or position value change occurs in the reverse direc-
tion directly after switching on the digital on-board I/O, a hardware interrupt is not triggered.