12.5.5 WDOG_IF - Watchdog Interrupt Flags
Offset Bit Position
0x01C
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reset
0
0
0
0
0
Access
R
R
R
R
R
Name
PEM1
PEM0
WIN
WARN
TOUT
Bit Name Reset Access Description
31:5 Reserved To ensure compatibility with future devices, always write bits to 0. More information in 1.2 Conven-
tions
4 PEM1 0 R PRS Channel One Event Missing Interrupt Flag
Set when a wdog clear happens before a prs event has been detected on PRS channel one.
3 PEM0 0 R PRS Channel Zero Event Missing Interrupt Flag
Set when a wdog clear happens before a prs event has been detected on PRS channel zero.
2 WIN 0 R Wdog Window Interrupt Flag
Set when a wdog clear happens below the window limit value.
1 WARN 0 R Wdog Warning Timeout Interrupt Flag
Set when a wdog warning timeout has occurred.
0 TOUT 0 R Wdog Timeout Interrupt Flag
Set when a wdog timeout has occurred.
EFM32JG1 Reference Manual
WDOG - Watchdog Timer
silabs.com | Smart. Connected. Energy-friendly. Preliminary Rev. 0.6 | 330
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