Silicon Laboratories Si5342

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Summary

1. Scope

1.1. Related Documents

Lists associated datasheets, errata, and user guides for the device family.

2. Overview

2.3. Available Software Tools and Support

Introduces ClockBuilder Pro software for device configuration and available support resources.

3. DSPLL and MultiSynth

3.2. DSPLL Loop Bandwidth

Explains DSPLL loop bandwidth settings for jitter attenuation and stability control.

4. Modes of Operation

4.7. Holdover Mode

Details the device's behavior and configuration parameters during holdover mode operation.

5. Clock Inputs

5.3. Fault Monitoring

Covers fault detection mechanisms like LOS, OOF, and LOL for input clock signals.

6. Output Clocks

6.3. Output Signal Format

Describes configuration of output signal formats, voltage swing, and common mode voltage.

8. Digitally-Controlled Oscillator (DCO) Mode

8.1. DCO with Frequency Increment;Decrement Pins;Bits

Explains frequency adjustment of N dividers using FINC/FDEC pins or register bits.

9. Serial interface

9.2. SPI Interface

Details the SPI interface, including connection options and command formats.

11. XAXB External References

11.1. Performance of External References

Discusses the impact of external references on jitter performance and selection criteria.

12. Crystal and Device Circuit Layout Recommendations

12.1. 64-Pin QFN Si5345 Layout Recommendations

Provides specific layout guidelines for the 64-pin QFN Si5345 package.

13. Power Management

13.3. Power Supply Sequencing

Discusses power supply voltage requirements and sequencing for optimal operation.

14. Register Map

14.3. Si5345 Register Map

Details the register map for the Si5345, organized by device and register page.