Sony CDX-GT454US - Schematic Diagram -Main Section (2;3)

CDX-GT450U/GT454US
CDX-GT450U/GT454US
1919
12 15
A
6
B
8
E
14943
F
D
H
72 10
I
G
11
C
5 131
(3/3)
BOARD
MAIN
3
1
(1/3)
MAIN BOARD
BOARD
4
MAIN
(3/3)
12
IC B/D
3.30
3
14.4 6.3 14.4
5.2 5.2 0.7 0.8 0.8 5.1 5.1
14.4 0.6 1.1 3.3 3 5.1 5.1
3.2
3.2
3.2
3.2
3.2
3.2
3.3
3.3
0
3 0 3 3 0 0 0 3 3 3.3 0 3.3 3.2 0 0 0 3 3.3
3.2
2.6
3
0
0
0
0
0
0
3.3
3.2
3.2
0
0
0
0
3.3
0
3.7
0 0 0
0.3 1.4 3.1 1.7 0.7 3.3
3 3
2.7 3.3
0
3.2 3.3 1.1
0
3.1 3.1
(GT454US)
*
2
(GT450U)
*
1
*
1
*
2
*
1
*
2
*
1
*
2
MAIN BOARD (2/3)
IC601
IC501
0.01C510
100kR561
100kR528 0R509
1k
R510
1kR512 470R570
100kR519
100kR513
100kR532
10kR536
100kR533 10MR501 220kR508
18pC508 22pC507
100R540
100kR514
0.01C513
1000pC502
100R539
0.5%10kR530
100R503
0.5%10kR505
100R502
0.5%10kR504
1000pC512
1000pC514
0.01C523
0.01C522
R599
R507
R573 R538
R537 R550 100k R575 100k R506 100k R551 100k
R523 R552 100k
100k 0.01C504 10kR500
10kR534
100kR531 100kR584
R556
1kR591
1kR585
10kR535
10kR589
0R517
100kR567
0R516
2.2kR522 2.2kR521 47pC521 47pC520
1
2
3
4
5
6
7
8
8P
CN501
RESET
CLK
BUSY
TXD
RXD
BU3.3V
FLASH_W
GND
R577 100k
7.92MHz
X501
100k
R571
CAM001
R560
100k
R562 100k
CL001
CL002
CL003 CL004
0R542 0R543
0R555 0R529
R581 1M
R583
100k
100k
R587
R588 100k
100R592
100R593
100kR596
100R598
100R544
100k
R568
16V
C615
100
470
R611
10uH
L602
18kR607
C604 4.7
0.1C609
3.3k
R604
C603 150p
1C611
16V100C600
0.047
C602
C612 10V470
3.3k
R610
C605
0.1
IC601
BD9070FP-E2
USB VBUS POWER SUPPLY
1
VREGB
2
VIN
3
NCO
4
NCO
5
PGND
6
GND
7
RT
8
SYN/EN
9
HSDCTL
10
FLG
11
NCO
12
HSDSW
13
HSDSW
19
FB
14
NCO
15
VDD
16
VDD
17
OVP
18
INV
20
NCO
21
SW
22
SW
23
NCO
24
PV_IN
25
PV_IN
26
TAB
27
TAB
25V100C614
MA24D5000BS0
D601
R702 0
0.01
C704
100R707
R710 100
R713 100k
R705 0
16V10C703
R708 0
BAT54ALT1G
D731
0R701
0.01C710
FB501
R566 100k
10V
100
C701
0R716
470R602
47uHL601
0.033C606
0.01
C711
28P
CN701
14
DR_6V
13
DR_GND
12
RXD
11
TXD
10
NC
9
CDM_ON
8
CD_ON
7
VBUS_ON
6
Z_MUTE
5
A_ATT
4
BU_3.3V
3
BU_GND
2
USB_GND
28A_GND
27VDD_3.3V
26D_GND
25NC
24SP_DATA
23SP_CLK
22OPEN_REQ
21EJECK_OK
20X_FLASH
19SYS_RST
18WAKEUP
17BU_CHECK
16USB_GND
1
USB_D+ 15USB_D-
1000pC518
100kR565
R709
100k
L603 47uH
R554 100k
100k
R595
100k
R594
0.5%
820
R608
0.5%
2.2k
R603
2.2k
R609
0.5%
1C613
47kR601
C607 1
470R605 470R606
R525 100k
100k
470
R511
32.768kHz
X502
JL001
JL002
JL003
JL004
JL005
JL006
JL007
100kR572
IC501
R5F3650KBDZ99FA
SYSTEM CONTROL
1
LCD_SO
2
LCD_CLK
3
NOSE_SW
4
SIRCS
5
UNISO
6
UNISI
7
UNISCK
8
BYTE
9
CNVSS
10
XIN
11
XOUT
12
RESET
13
OSCOUT
14
VSS
15
OSCIN
16
VCC1
17
NMI
18
RC_IN1
19
BUIN
20
SYSRST
21
BUS_ON
22
MC_RX
23
NCO
24
MC_TX
25
NCO
26
SYNC_OUT
27
NCO
28
BEEP
29
I2C_SCK
30
I2C_SIO
31
FW_TXD
32
FW_RXD
33
FW_CLK
34
FW_BUSY
35
NCO
36
NCO
37
CD_ON
38
CDM_ON
39
WAKE_UP
40
Z_MUTE
41
EPM
42
MODELNAME_SEL0
43
MODELNAME_SEL1
44
MODELNAME_SEL2
45
MODELNAME_SEL3
46
CE
47
NCO
48
SA_DATAIN
49
SA_CLKOUT
50
USBON
51
VBUS_ON
52
USB_OVR
53
EXTATT_XEN
54
NCO
55
NCO
56
TELATT
57
ACC_IN
58
ATT
59
DIAG
60
AMPSTB
61
CYRIL_SEL
62
VCC2
63
NCO
64
VSS
65
ILLUMI SEL
66
COLSW SEL
67
NCO
68
B-OUT SEL
69
AREASEL3
70
AREASEL2
71
AREASEL1
72
AREASEL0
73
R/S SW SEL
74
NCO
75
NCO
76
INITCOL_SEL
77
NCO
78
NCO
79
DEBUG_1
80
DEBUG_2
81
RE-IN1
82
RE-IN0
83
NCO
84
NCO
85
NCO
86
NCO
87
NCO
88
NCO
89
NCO
90
NCO
91
KEYACK0
92
KEYACK1
93
NCO
94
KEYIN1
95
KEYIN0
96
AVSS
97
RC_IN0
98
AVRH
99
AVDD
100
LCD_CE
CL006
CL007
CL008
CL009
CL010
CL011
CL012
CL013
CL014
CL015
CL016
CL017
CL018
CL019
CL020
CL021
CL041
CL024
CL025
CL031
CL040
CL026
CL028
CL022
CL027
CL029
CL023
CL030
JL008
RKZ6.8B2KGP1D501
0R563
100R580
R564
100R711
0
C517
0R865
1kR866
4.7kR867
FB704
FB705
FB706
1 2 4 3 5 6 7 8 BUS1 BUS2 BUS3 BUS4
18
19
20
21
BUS5
BUS6
BEEP RESET
VBUS_ON
MC_TX MC_RX SYS_RST BU_IN
USB_OVER
USB_ON
SYNC_OUT
BUSY
CD_ON
CDM_ON
WAKE_UP
Z_MUTE
SA_DA
SA_CLK
LCD_CLK
VBUS_ON
CDM_ON
MC_TX
CD_ON
Z_MUTE
A_ATT
SYNC_OUT
TXD
STB
SIRCS
ACC
DIAG
USB_ON
TXD
LCD_DATA
MC_RX
USB_D+
CNVSS EJECT_OK RCIN1
CLK
RE1
SYS_RST
USB_D-
BU_IN
WAKE_UP
EJECT_OK
SA_CLK
SA_DA
NOSE_SW
RXD
I2C_SCK
I2C_SIO
I2C_SCK
CLK
RESET
USB_OVER
RXD
BUSY
CNVSS
RE0
I2C_SIO
TEL
A_ATT
KEY1
KEY0
RCIN0
LCD_CE
UNIT
(MG-101N)
(1/2)
CD MECHANISM
(CHASSIS)
(
PROGRAMMING
FLASH
)
R537,564,573 100k
R507,538,556 100k
• See page 14 for Waveforms. • See page 24 for IC Block Diagrams. • See page 26 for IC Pin Function Description of IC501.
4-5. SCHEMATIC DIAGRAM – MAIN Section (2/3) –
(Page 18)
(Page 20)
(Page 20)