Sony CDX-GT454US - Schematic Diagram -Main Section (3;3)

CDX-GT450U/GT454US
CDX-GT450U/GT454US
2020
12 15
A
6
B
8
E
14943
F
D
H
72 10
I
G
11
C
5 131
BOARD
A
CN901
KEY
(1/3)
BOARD
MAIN
2
(2/3)
BOARD
MAIN
3
4
MAIN
(2/3)
BOARD
3
IC B/D
IC B/D
0
00
0
0
0
0
0
0
0
00
0(1.3)
8.5(6.8)
0(4.2)
8.5(6.8)
3.1(2.9)
1.1(2.9)
3.1(2.9)
0(1.2)
0(1.2)
8.5
0(1.7)
2.2
3.8
3.7
3.8
5.6
0.3(1.9)
8.5
3(3.6)
7.1
3.9(5)
3.4
3.1(3.3)
6.2
3.1(3.3)
6.2
3.9
3.9
3.9 3.6
3.9 3.6
3.9 3.2
3.9
3.6 3.2
3.6
3.9
8.5
3.6
3.1
3.1
8.4
3.9
3.6
3.6
3.6
GT454US
GT450U
0
GT454US
GT454US
GT450U
GT450U
GT454US
GT450U
R15
0
R16
FB2
0
R3
FB3
0
FB1
MAIN BOARD (3/3)
IC401
IC001
50VC410 10
BD3467FV-E2
IC401
ELECTRONIC VOLUME
BUS_LCH
BUS_RCH
TU_LCH
TU_RCH
AUX_LCH
AUX_GND
AUX_RCH
DP1
DN
DP2
EP1
EN
EP2
FP1
FN1
FN2
FP2
NCO
NCO
NCO
MUTE
I2C_SCK
I2C_SIO
GND
FIL
VCC(8.5V)
AU_OUT_RCH
AU_OUT_LCH
NCO
AU_IN_SUB
AU_IN_RL
AU_IN_RR
AU_IN_FL
AU_IN_FR
AU_OUT_FR
AU_OUT_FL
AU_OUT_RR
AU_OUT_RL
AU_OUT_SR
AU_OUT_SL
FB403
100pC423
50V10C422
50V10C425
220R404
R402 220
100pC412
220R423
10kR411 R403 10k
100pC426
0.1C414
10kR405
50V10C420
100pC421
220R410
FB402
10kR424
470
R415
2.2k
R419
C158 1000p
1000pC442
12k
R418
0
R420
470
R416
CAM003
1C436
1C437
C443 1
C444 1
0
L402
10kR438
50V10C419
0R432
0R431
0R430
C100 0.1
50V10C413
10kR42210kR409
50V10C424
0R116
0R435
0R436
R406
0
12k
R417
RTAN140M-T111-1
Q401
MUTE
RTAN140M-T111-1
Q402
MUTE
RTAN140M-T111-1
Q403
MUTE
RTAN140M-T111-1
Q404
MUTE
RTAN140M-T111-1
Q405
MUTE
RTAN140M-T111-1
Q406
MUTE
50V2.2C417
50V2.2C418
0
R441
1C438
220R407
220R421
D117
D118
C101 1000p
C203
1000p
D110
RKZ6.8B2KGP1
D108
RKZ6.8B2KGP1
D107
RKZ6.8B2KGP1
D106
RKZ6.8B2KGP1
D105
RKZ6.8B2KGP1 RKZ6.8B2KGP1
D104
RKZ6.8B2KGP1
D103
RKZ6.8B2KGP1
D102
RKZ6.8B2KGP1
D101
RKZ18B2KGP1
D109
RKZ6.8B2KGP1D116
0R434
0R433
16V220C415
1
2
3
4
5
6
7
8
9
10
11
12
13
13P
CN402
AU_GND
AU_IN_RCH
AU_GND
AU_IN_LCH
AU_GND
AU-SUB_CH
AU_GND
AU_RL_CH
AU_FL_CH
AU_GND
AU_GND
AU_FR_CH
AU_RR_CH
20P
CN102
1
USB_GND
2
USB_VBUS
3
D-
4
D+
5
GND
6
KEY_GND
7
AUX_L
8
AUX_R
9
AUX_GND
10
RE_0
11
RE_1
12
KEY_1
13
KEY_0
14
SIRCS
15
LCD_DATA
16
LCD_CE
17
LCD_CLK
18
ILL(FP+B)
19
PANEL_SW
20
GND
D119 RKZ6.8B2KGP1
C103
0.1
0R122
0R121
L405 0
R13 100
J1
JW126 JW102
16V47C28
2.2C13
3.3uH
L1
CAM002
JW148
4.7kR 11
33pC8
470k
R2
0.1C26
1000pC5
4MHzX1
JW147
15p
C6
470k
R1
0.01C22
0.1C24
560uHL7
1000p
C1
L2
2.2uH
JW138
0.47C16
0.1
C9
0.22C12
1C21
L6
FM MIX
1
2
34
6
0.01C20
0.1C25
12pC18
R14 100
JW137
VR1
22R12
IC001
TEF6617T/V1/S470,518
PHASE LOCKED LOOP(PLL)
AMRFIN
AMRFDEC
FMIN2
FMIN1
GNDRF
VCC2
AMRFAGC
LOUT
ROUT
GNDAUD
AMIFAGC2
MPXIN
MPXOUT
RSSI
XTAL2
XTAL1
GNDD
SCL
SDA
VREF
VREGSUP
VCC1
GND
VCODEC
PLL
PLLREF
TEST
AMSELIN1
AMSELIN2
AMIFAGC1
AMSELOUT1
AMSELOUT2
0.1C17
560uHL8
0.01C23
0.01C19
0.1C27
11
12
13
14
15
16
18
19
17
20
21
BUS5
BUS6
CL076
CL069
CL061
CL066
CL074
CL065
CL079
CL072
CL073
CL068
CL070
CL077
CL064
CL078
CL067
CL071
CL075
CL063
J401
2P
G
J402
4P
C405 0
ILL+B
USB_D+
USB_D-
RE0
RE1
KEY1
KEY0
SIRCS
LCD_DATA
LCD_CE
LCD_CLK
NOSE_SW
CD MECHANISM
(2/2)
(MG-101N)
UNIT
(CHASSIS)
(CHASSIS)
(ANTENNA)
REAR/SUB
R
AUDIO OUT
L
-1
-2
-4
-3
-1
-2
R
REAR/SUB
L
R
FRONT
AUDIO OUT
L
40
39
38
37
36
35
34
7
6
5
4
3
2
1
33
32
30
31
8
27
28
29
9
10
11
12
13
14
24
17
25
26
23
22
21
20
19
18
15
16
18
7
6
5
4
3
2
1
17
20
19
32
30
31
8
27
28
29
9
10
11
12
13
14
24
25
26
23
22
21
15
16
• See page 14 for Waveforms. • See page 24 for IC Block Diagrams.
4-6. SCHEMATIC DIAGRAM – MAIN Section (3/3) –
(Page 22)
(Page 19)
(Page 19)
(Page 18)