Sony CDX-GT61UMS - DIAGRAMS AND SCHEMATICS; Block Diagrams Overview

CDX-GT61UMS/GT560UE/GT560UI/GT560US/GT564UI/GT610UG/GT610US/GT616UG
CDX-GT61UMS/GT560UE/GT560UI/GT560US/GT564UI/GT610UG/GT610US/GT616UG
1818
SECTION 4
DIAGRAMS
4-1. BLOCK DIAGRAM - AUDIO INPUT Section -
CD MECHANISM
DECK BLOCK
(MG-101CA-188)
AUTO POWER
CONTROL
Q710
FPI1
A
B
C
F
E
PD
LD
18
FNI2
15
FNI1
16
FPI2
17
TNI
21
TPI
20
LDO
25
MDI
24
CD HEAD AMP,
DIGITAL SERVO PROCESSOR,
AUDIO DSP
IC701
CD DRIVE/USB
CONTROLLER
IC601
FOCUS
FOO
31
TRACK
TRO
32
SL
FMO
34
SP
DMO
35
DRV_ON
DRV_ON
35
LOAD
MEC_LOAD
36
EJECT
MEC_EJECT
37
USB+
85
USB–
86
D_SW
MEC_LIMIT
39
IN_SW
MEC_INSW
40
L_SW
MEC_DSW
41
SELF
MEC_SELFSW
25
X701
16.934MHz
XO
XI
67
66
70ADIN1 (IN_L-CH)
74ADIN2 (IN_R-CH)
PRE_L
PRE_R
A
B
57DAO3 (F_L-CH)
54DAO2 (F_R-CH) R-CH
59DAO4 (R_L-CH)
61DAO5 (SUB-CH)
52DAO1 (R_R-CH) R-CH
FL FL, RL, SUB
RL
SUB
17
DEC_LRCK
23
CD_SI
22
CD_SO
24
CD_SCLK
29
CD_XCCE
19
DEC_DATA
18
DEC_BCK
27
DEC_INT
16
DEC_XMUTE
92
BSIF_LRCK
91
BSIF_BCK
93
DEC_XMUTE
20
DEC_GATE
89
BSIF_GATE
38
DEC_SSTBY
37
/SRAMSTB
21
DEC_REQ
88
BSIF_REQ
87
DEC_REQ
90
BSIF_DATA
So
79
Si
80
SCL
81
/CCE
82
28
CD_XRST
/RST
85
15
CD_ZDET
ZDET
94
3
2
1
D+
D–
VBUS-USB
USB_VBUS
CN902
95SP_DATA
SA_DATA89
96SP_CLK
SA_CLK90
53CDON
CD_ON38
56RxD
MC_TX24
55TxD
MC_RX22
52MECON
CDM_ON39
8WAKEUP
WAKE_UP40
54ZMUTE
Z_MUTE42
74VBUS_ON
VBUS_ON51
51A-ATT
12BU_IN
3RESET
SYSRST20
BU_IN
E
A_ATT
F
RESET
D
D731
SDA
EEPROM
IC680
13
SCL12
NRESET471CP_RESET
69CP_SCL
68CP_SDA
72CPON
73CDON_15V
B+ SWITCH
Q682, 683
+1.5V
REGULATOR
IC682
IC701 VDDM1
+1.5V
REGULATOR
IC681
IC701 VDD1
BU +3.3V
SYSTEM CONTROLLER
IC501 (1/3)
SIGNAL PATH
: AUDIO
: CD
: USB
R-ch is omitted due to same as L-ch.
X601
12MHz
X2
X1
82
80
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