CFD-S38
– 27 –
6-9. SCHEMATIC DIAGRAM — MAIN SECTION (1/3) — • Refer to page 37 for IC Block Diagrams.
– 28 –
Note on Printed Wiring Boards:
• X : parts extracted from the component side.
• b : Pattern from the side which enables seeing.
• Abbreviation
AR : Argentine model.
CND : Canadian model.
SP : Singapore model.
Note on Schematic Diagram:
• All capacitors are in µF unless otherwise noted. pF: µµF
50 WV or less are not indicated except for electrolytics
and tantalums.
• All resistors are in Ω and
1
/
4
W or less unless otherwise
specified.
• C : panel designation.
• U : B+ Line.
• Power voltage is dc 9 V and fed with regulated dc power
supply from battery terminal.
• Voltage and waveforms are dc with respect to ground
under no-signal (detuned) conditions.
no mark : PB
( ) : REC
• Voltages are taken with a VOM (Input impedance 10 MΩ).
Voltage variations may be noted due to normal produc-
tion tolerances.
• Signal path.
F : FM
E : PB
a : REC
Ref. No. Location
D302 C-5
D303 H-5
D351 D-3
D501 D-6
D951 H-5
D952 H-5
D953 I-4
D955 H-5
D957 I-5
IC301 F-8
IC302 F-5
IC303 I-6
IC304 I-8
IC501 C-8
• Semiconductor Location
Ref. No. Location
IC502 D-6
IC503 B-10
IC701 H-13
IC702 H-11
IC703 E-13
Q301 C-5
Q308 E-5
Q309 E-4
Q311 F-9
Q312 E-10
Q313 F-10
Q321 C-6
Q322 C-5
Q323 C-5
Ref. No. Location
Q324 C-5
Q325 C-4
Q326 C-5
Q501 D-8
Q502 D-8
Q503 C-11
Q505 B-10
Q506 B-10
Q701 I-11
Q951 H-4
Q952 H-4
Q953 H-4
Q954 H-4
Q955 I-4
Q957 H-5
(Page 36)
(Page 30)
(Page 22)
(Page 31)