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Supermicro X11DAi-N - Page 90

Supermicro X11DAi-N
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
90
S5 Trigger ADR
          
integrity. The options are Disable and Enable.
2X Refresh Enable
Select Enable for memory 2X refresh support to enhance memory performance. The options
are Disable, Enable and Auto.
Page Policy
Use this feature to set the page policy for onboard memory support. The options are Closed,
Adaptive, and Auto.
IMC Interleaving
           
          
Auto.
Memory Topology
This item displays the information of onboard memory modules as detected by the BIOS.
P1 DIMMA1/DIMMA2/DIMMB1/DIMMC1/DIMMD1/DIMMD2/DIMME1/DIMMF1
P2 DIMMA1/DIMMA2/DIMMB1/DIMMC1/DIMMD1/DIMMD2/DIMME1/DIMMF1
Memory RAS (Reliability_Availability_Serviceability) Conguration

Static Virtual Lockstep Mode
Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are Enable and Disable.
Mirror Mode (available when ADDDC Sparing is set to Disable)
    
installed in the system which will create a duplicate copy of data stored in the memory to
increase memory security, but it will reduce the memory capacity into half. The options are
Disable and Enable Mirror Mode 1LM.
UEFI ARM Mirror (available when ADDDC Sparing is set to Disable)

Range memory will be enabled upon system boot. This will create a duplicate copy of data
stored in the memory to increase memory security, but it will reduce the memory capacity
into half. The options are Disable and Enable.

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