Supermicro X11SCQ-L - Page 47

47
Chapter 2: Installation
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X11SCQ
REV:1.01
MAC CODE
BAR CODE
DESIGNED IN USA
BIOS
LICENSE
Intel
Q370/H310
JGP1
JSMB1
DIMMA1
DIMMB1
DIMMA2
DIMMB2
J23
COM3/4
COM5/6
MH12
MH11
MH9
CON1
JPW2
SP1
COM2
COM1
JSTBY1
JD1
FAN1
FAN3
FAN4
FAN2
JPT1
JAT1
JPME2
JWD1
JLED1
JPL2
JPAC1
JPL1
JPW1
JL1
I-SATA5
I-SATA2
I-SATA4
I-SATA1
I-SATA3
I-SATA0
JF1
JBT1
JSD1
JTPM1
J*
B3
LED3
LED1
EDP
CPU
AUDIO FP
USB4/5
USB6/7(3.1)
SLOT4
SLOT5
SLOT6
ON
PWR
X
LED
OH/FF
RST
NIC2 NIC1
HDD
LED
USB10/11(3.1)
LED
PWR
HD AUDIO
SLOT7
UNB NON-ECC DDR4 DIMM REQUIRED
ALWAYS POPULATE BLUE SOCKET FIRST
PCI-E M.2-M1
LAN2
USB2/3
USB8/9(3.1)
LAN1
HDMI/DP
DVI-D
CPU FAN
KB/MOUSE
USB0/1
J5
1. General Purpose Header
2. Speaker/Buzzer
General Purpose I/O Header
The JGP1 (General Purpose Input/Output) header is a general purpose I/O expander on a
pin header via the SMBus. Each pin can be congured to be an input pin or output pin in
2.54mm pitch. The GPIO is controlled via the PCA9554APW 8-bit GPIO expansion from PCH
SMBus. The base address is 0xEFA0. The expander slave address is 0x70 for WRITE and
0x71 for READ.. See the table below for pin denitions.
Internal Speaker/Buzzer
The Internal Speaker/Buzzer (SP1) is used to provide audible indications for various beep
codes.
1
2
JGP1 Header
Pin Denitions
Pin# Denition
1 +5V
2 GP0
3 GP1
4 GP2
5 GP3
6 GP4
7 GP5
8 GP6
9 GP7
10 Ground