4-16
X7DWA-N User's Manual
DCA Delay Clocks (Available if supported by the CPU.)
This feature allows the user to set the clock delay setting from snoop to prefetch
for Direct Cache Access. Select a setting from 8 (bus cycles) to 120 (bus cycles)
(in 8-cycle increment). The default setting is 32 (bus cycles).
Intel <R> Virtualization Technology (Available if supported by the
CPU.)
Select Enabled to use the feature of Virtualization Technology to allow one platform
to run multiple operating systems and applications in independent partitions, creating
multiple "virtual" systems in one physical computer. The options are Enabled and
Disabled. (Note: If there is any change to this setting, you will need to power off
and restart the system for the change to take effect.) Please refer to Intel’s web
site for detailed information.
Intel EIST Support (Available if supported by the CPU.)
Select Enabled to use the Enhanced Intel SpeedStep Technology and allows the
system to automatically adjust processor voltage and core frequency in an effort
to reduce power consumption and heat dissipation. The options are Enabled and
Disabled. Please refer to Intel’s web site for detailed information.
SMRR Control (Available if supported by the CPU.)
Select Enabled to use the feature of System Management Mode Address Register
which will make the memory region specifi ed in the register uncacheable while
not executing in SMM (System Management Mode). This feature will protect your
system by preventing an external program (including a virus) from using SMM.
The options are Enabled and Disabled. Please refer to Intel’s web site for
detailed information.
C State Supported (Available if supported by the CPU.)
This feature allows the user to choose the ACPI Power Management State to be
supported by the BIOS. Select C1 to activate the Enhanced Halt State mode in
order to lower power consumption. Select C2 to activate the Stop-Clock mode to
keep all CPU software visible. Select C3 to activate the Sleep mode where the
CPU does not need to keep its cache coherent, but maintains other states. Select
C4 to activate the package-level lower-power mode after each CPU core has been
set to C3 State in an effort to reduce the power consumption further. The options
are C1, C1C2 (C1 & C2), C1C2C3 (C1, C2 & C3), and C1C2C3C4 (C1, C2, C3
and C4.) Please refer to Intel’s web site for detailed information.
XI/O Device Confi guration
Access the submenu to make changes to the following settings.
To Next Page
Loading...
