Texas Instruments MSP430 series Manual

Direction
0: Input
1: Output
P2SEL.5
P2DIR.5
P2IN.5
P2IRQ.5
D
EN
Module X IN
Module X OUT
P2OUT.5
Interrupt
Edge
Select
Q
EN
Set
P2SEL.5
P2IES.5
P2IFG.5
P2IE.5
P2.5/ROSC/CA5
DVSS
DVCC
1
1
0
1
0
1
0
Bus
Keeper
EN
DCOR
To DCO
Pad Logic
From Comparator
To Comparator
CAPD.5
in DCO
P2REN.5
MSP430F23x
MSP430F24x(1)
MSP430F2410
www.ti.com SLAS547I –JUNE 2007–REVISED DECEMBER 2012
Port P2 Pin Schematic: P2.5, Input/Output With Schmitt Trigger
Table 22. Port P2.5 Pin Functions
CONTROL BITS / SIGNALS
(1)
PIN NAME (P2.x) x FUNCTION
CAPD DCOR P2DIR.5 P2SEL.5
P2.5 (I/O) 0 0 I: 0; O: 1 0
R
OSC
0 1 X X
P2.5/R
OSC
/CA5 5
DV
SS
0 0 1 1
CA5 1 or selected 0 X X
(1) X = Don't care
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Texas Instruments MSP430 series Specifications

General

Program Memory Type	Flash
CPU Core	MSP430
Clock Speed	Up to 25 MHz
Flash Memory	Up to 512 KB (depending on specific device)
RAM	Up to 66 KB (depending on specific device)
Operating Voltage	1.8V to 3.6V
ADC	10-bit or 12-bit
Communication Interfaces	UART, SPI, I2C, USB
Temperature Range	-40°C to +85°C
Timers	16-bit timers
Architecture	16-bit RISC
Low Power Modes	Multiple (LPM0 to LPM4)