MSP430F23x
MSP430F24x(1)
MSP430F2410
SLAS547I –JUNE 2007–REVISED DECEMBER 2012
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Table 2. Terminal Functions, MSP430F23x (continued)
TERMINAL
I/O DESCRIPTION
NAME NO.
P6.3/A3 2 I/O General-purpose digital I/O / analog input A3 - 12-bit ADC
P6.4/A4 3 I/O General-purpose digital I/O / analog input A4 - 12-bit ADC
P6.5/A5 4 I/O General-purpose digital I/O / analog input A5 - 12-bit ADC
P6.6/A6 5 I/O General-purpose digital I/O / analog input A6 - 12-bit ADC
P6.7/A7/SVSIN 6 I/O General-purpose digital I/O / analog input A7 - 12-bit ADC/SVS input
XT2OUT 52 O Output terminal of crystal oscillator XT2
XT2IN 53 I Input port for crystal oscillator XT2
RST/NMI 58 I Reset input, nonmaskable interrupt input, or bootstrap loader start (in flash devices)
TCK 57 I Test clock (JTAG). TCK is the clock input port for device programming test and bootstrap loader start.
TDI/TCLK 55 I Test data input or test clock input. The device protection fuse is connected to TDI/TCLK.
TDO/TDI 54 I/O Test data output. TDO/TDI data output or programming data input terminal.
TMS 56 I Test mode select. TMS is used as an input port for device programming and test.
V
eREF+
10 I Input for an external reference voltage
V
REF+
7 O Output of positive terminal of the reference voltage in the ADC12
Negative terminal for the reference voltage for both sources, the internal reference voltage, or an external
V
REF-
/V
eREF-
11 I
applied reference voltage
XIN 8 I Input for crystal oscillator XT1. Standard or watch crystals can be connected.
XOUT 9 O Output for crystal oscillator XT1. Standard or watch crystals can be connected.
QFN Pad NA NA QFN package pad connection to DV
SS
recommended
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