Instruction Set
3-31
RISC 16−Bit CPU
* CLRC Clear carry bit
Syntax CLRC
Operation 0 −> C
Emulation BIC #1,SR
Description The carry bit (C) is cleared. The clear carry instruction is a word instruction.
Status Bits N: Not affected
Z: Not affected
C: Cleared
V: Not affected
Mode Bits OSCOFF, CPUOFF, and GIE are not affected.
Example The 16-bit decimal counter pointed to by R13 is added to a 32-bit counter
pointed to by R12.
CLRC ; C=0: defines start
DADD @R13,0(R12) ; add 16-bit counter to low word of 32-bit counter
DADC 2(R12) ; add carry to high word of 32-bit counter
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