Hibernation Module
Prototype:
void
ROM_HibernateLowBatSet(uint32_t ui32LowBatFlags)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_HIBERNATETABLE is an array of pointers located at ROM_APITABLE[19].
ROM_HibernateLowBatSet is a function pointer located at ROM_HIBERNATETABLE[8].
Parameters:
ui32LowBatFlags specifies behavior of low battery detection.
Description:
Enables the low battery detection and whether hibernation is allowed if a low battery is de-
tected. If low battery detection is enabled, then a low battery condition is indicated in the
raw interrupt status register, and can also trigger an interrupt. Optionally, hibernation can be
aborted if a low battery is detected.
The ui32LowBatFlags parameter is one of the following values:
HIBERNATE_LOW_BAT_DETECT - detect a low battery condition.
HIBERNATE_LOW_BAT_ABORT - detect a low battery condition, and abort hibernation
if low battery is detected.
Returns:
None.
11.2.1.15 ROM_HibernateRequest
Requests hibernation mode.
Prototype:
void
ROM_HibernateRequest(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_HIBERNATETABLE is an array of pointers located at ROM_APITABLE[19].
ROM_HibernateRequest is a function pointer located at ROM_HIBERNATETABLE[20].
Description:
This function requests the Hibernation module to disable the external regulator, thus removing
power from the processor and all peripherals. The Hibernation module will remain powered
from the battery or auxiliary power supply.
The Hibernation module will re-enable the external regulator when one of the configured wake
conditions occurs (such as RTC match or external WAKE pin). When the power is restored
the processor will go through a normal power-on reset. The processor can retrieve saved
state information with the ROM_HibernateDataGet() function. Prior to calling the function to
request hibernation mode, the conditions for waking must have already been set by using the
ROM_HibernateWakeSet() function.
Note that this function may return because some time may elapse before the power is actu-
ally removed, or it may not be removed at all. For this reason, the processor will continue
116 April 8, 2013
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