Texas Instruments Tiva TM4C123GH6PM - Page 143

Interrupt Controller (NVIC)
Description:
This function gets the current setting of the interrupt priority masking level. The value returned
is the priority level such that all interrupts of that and lesser priority are masked. A value of 0
means that priority masking is disabled.
Smaller numbers correspond to higher interrupt priorities. So for example a priority level mask
of 4 will allow interrupts of priority level 0-3, and interrupts with a numerical priority of 4 and
greater is blocked.
The hardware priority mechanism will only look at the upper 3 bits of the priority level, so any
prioritization must be performed in those bits.
Returns:
Returns the value of the interrupt priority level mask.
13.2.1.12 ROM_IntPriorityMaskSet
Sets the priority masking level
Prototype:
void
ROM_IntPriorityMaskSet(uint32_t ui32PriorityMask)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_INTERRUPTTABLE is an array of pointers located at ROM_APITABLE[14].
ROM_IntPriorityMaskSet is a function pointer located at ROM_INTERRUPTTABLE[10].
Parameters:
ui32PriorityMask is the priority level that is masked.
Description:
This function sets the interrupt priority masking level so that all interrupts at the specified or
lesser priority level is masked. This can be used to globally disable a set of interrupts with
priority below a predetermined threshold. A value of 0 disables priority masking.
Smaller numbers correspond to higher interrupt priorities. So for example a priority level mask
of 4 will allow interrupts of priority level 0-3, and interrupts with a numerical priority of 4 and
greater is blocked.
The hardware priority mechanism will only look at the upper 3 bits of the priority level, so any
prioritization must be performed in those bits.
Returns:
None.
13.2.1.13 ROM_IntPrioritySet
Sets the priority of an interrupt.
Prototype:
void
ROM_IntPrioritySet(uint32_t ui32Interrupt,
uint8_t ui8Priority)
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