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Texas Instruments Tiva TM4C123GH6PM User Manual

Texas Instruments Tiva TM4C123GH6PM
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Analog to Digital Converter (ADC)
5.2.1.23 ROM_ADCSequenceOverflowClear
Clears the overflow condition on a sample sequence.
Prototype:
void
ROM_ADCSequenceOverflowClear(uint32_t ui32Base,
uint32_t ui32SequenceNum)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_ADCTABLE is an array of pointers located at ROM_APITABLE[5].
ROM_ADCSequenceOverflowClear is a function pointer located at ROM_ADCTABLE[10].
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
Description:
This will clear an overflow condition on one of the sample sequences. The overflow condition
must be cleared in order to detect a subsequent overflow condition (it otherwise causes no
harm).
Returns:
None.
5.2.1.24 ROM_ADCSequenceStepConfigure
Configure a step of the sample sequencer.
Prototype:
void
ROM_ADCSequenceStepConfigure(uint32_t ui32Base,
uint32_t ui32SequenceNum,
uint32_t ui32Step,
uint32_t ui32Config)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_ADCTABLE is an array of pointers located at ROM_APITABLE[5].
ROM_ADCSequenceStepConfigure is a function pointer located at ROM_ADCTABLE[8].
Parameters:
ui32Base is the base address of the ADC module.
ui32SequenceNum is the sample sequence number.
ui32Step is the step to be configured.
ui32Config is the configuration of this step; must be a logical OR of ADC_CTL_TS,
ADC_CTL_IE, ADC_CTL_END, ADC_CTL_D, one of the input channel selects
(ADC_CTL_CH0 through ADC_CTL_CH23), and one of the digital comparator selects
(ADC_CTL_CMP0 through ADC_CTL_CMP7).
50 April 8, 2013
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Texas Instruments Tiva TM4C123GH6PM Specifications

General IconGeneral
CoreARM Cortex-M4F
Clock Speed80 MHz
Flash Memory256 KB
SRAM32 KB
GPIO Pins43
UART8
I2C2
SPI/SSI4
USBUSB 2.0
Timers6
Communication InterfacesUART, I2C, SPI, USB
Operating Temperature-40°C to 85°C
PackageLQFP64

Summary

Boot Loader

Introduction

Explains the ROM-based boot loader and its interfaces for flash updates.

Serial Interfaces

Details the UART, SSI, and I2C interfaces used by the boot loader.

USB Interface

Describes the USB boot loader functionality using the DFU protocol.

Controller Area Network (CAN)

Flash

GPIO

Hibernation Module

Inter-Integrated Circuit (I2C)

Interrupt Controller (NVIC)

Memory Protection Unit (MPU)

Pulse Width Modulator (PWM)

Synchronous Serial Interface (SSI)

System Control

Timer

UART

uDMA Controller

USB Controller

Watchdog Timer

Functions

Lists and describes API functions for watchdog timer configuration, interrupts, and lock mechanism.

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