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Texas Instruments Tiva TM4C123GH6PM User Manual

Texas Instruments Tiva TM4C123GH6PM
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Floating-Point Unit (FPU)
9.2.1.8 ROM_FPUStackingDisable
Disables the stacking of floating-point registers.
Prototype:
void
ROM_FPUStackingDisable(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_FPUTABLE is an array of pointers located at ROM_APITABLE[26].
ROM_FPUStackingDisable is a function pointer located at ROM_FPUTABLE[7].
Description:
This function disables the stacking of floating-point registers s0-s15 when an interrupt is han-
dled. When floating-point context stacking is disabled, floating-point operations performed in
an interrupt handler destroy the floating-point context of the main thread of execution.
Returns:
None.
9.2.1.9 ROM_FPUStackingEnable
Enables the stacking of floating-point registers.
Prototype:
void
ROM_FPUStackingEnable(void)
ROM Location:
ROM_APITABLE is an array of pointers located at 0x0100.0010.
ROM_FPUTABLE is an array of pointers located at ROM_APITABLE[26].
ROM_FPUStackingEnable is a function pointer located at ROM_FPUTABLE[8].
Description:
This function enables the stacking of floating-point registers s0-s15 when an interrupt is han-
dled. When enabled, space is reserved on the stack for the floating-point context and the
floating-point state is saved into this stack space. Upon return from the interrupt, the floating-
point context is restored.
If the floating-point registers are not stacked, floating-point instructions cannot be safely exe-
cuted in an interrupt handler because the values of s0-s15 are not likely to be preserved for
the interrupted code. On the other hand, stacking the floating-point registers increases the
stacking operation from 8 words to 26 words, also increasing the interrupt response latency.
Returns:
None.
86 April 8, 2013
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Texas Instruments Tiva TM4C123GH6PM Specifications

General IconGeneral
CoreARM Cortex-M4F
Clock Speed80 MHz
Flash Memory256 KB
SRAM32 KB
GPIO Pins43
UART8
I2C2
SPI/SSI4
USBUSB 2.0
Timers6
Communication InterfacesUART, I2C, SPI, USB
Operating Temperature-40°C to 85°C
PackageLQFP64

Summary

Boot Loader

Introduction

Explains the ROM-based boot loader and its interfaces for flash updates.

Serial Interfaces

Details the UART, SSI, and I2C interfaces used by the boot loader.

USB Interface

Describes the USB boot loader functionality using the DFU protocol.

Controller Area Network (CAN)

Flash

GPIO

Hibernation Module

Inter-Integrated Circuit (I2C)

Interrupt Controller (NVIC)

Memory Protection Unit (MPU)

Pulse Width Modulator (PWM)

Synchronous Serial Interface (SSI)

System Control

Timer

UART

uDMA Controller

USB Controller

Watchdog Timer

Functions

Lists and describes API functions for watchdog timer configuration, interrupts, and lock mechanism.

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