Thermo LabSystems Multiskan EX - Page 158

RC and MS
have all memorv circuits and
memory control circuits of the Multiskan
through buffers circuits
Dl, D3 and D4.
USME will be
done with the
PAL circuit (CAL16VX-25)
and demultiplexer 07 (74HCl38).
The data line for memory circuits is lead to the
pcb MUSME though the two way buffer
circuit
D2 (74LS245).
ThedatainVO-operationswillp'dss thechannel
buffer of the external memory card, because
the buffer is active only in the memory
s are taken from outputs
s buffer circuit D19. Dl9
has been driven with cards IOCE*- and RD*-
signals to functiononly during VO-operations.
ThethfeeVOdaaahits whish tells theoperation
mode are written direct to the latchcircuit
B5.
See Table 3-10.
To the circuit 05 is written also D3 from
which condition depends the address
configuration of the memory.
CASS which tells if the memory cassette is
missing is read through the circuit D4.
The processor writes three operation modes
- AM2) and the drive hit of
the memory configuration
(MCON) to the
latch circuit D5.
To the
PAL circuit is lead control bits IOM*,
RD* and WK*, five most significant address
bits, the memory configurationsdrive MCON
and as a return coupling bits
CSE4* and
CSE5*.
GSRAM*
CSEE* Shows EEPRO
CSE* Shows EEPRO
put to the D7
CSMEG* Shows
128 kB EEP
circuit
IORD* 110 read operation to the
pch MUSME
UO write operation to the
pcb lLlUSME
Table
3-10
Output signalsfrom PAL circuit
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