5-6
In this period, current is supplied to capacitor CH14. This
current is a constant current which is made in CURRENT
MIRROR circuit, and is set with resistor RH18 connected to
pin 2. The voltage (1.9V) at pin 2, which is divided by
resistance of RH18, produces the current. The current flows
through CH14. Therefore, average voltage at pin 1 is decided
by the formula below.
DH04, RH22 and RH23 perform to limit F/V convert voltage
so that it does not rise extremely, even though the higher
frequency than responsive range of this model, is input. The
circuit using Ope Amp from pin 8 to pin10 of ICH05 limits
F/V convert voltage so that it does not decreases below
specified value when input signal does not come.
The voltage at pin 1 which is limited by the upper and lower
values, is amplified through amplifier of from pins 12 to 14
of ICH05. The amplifying character is set to the suitable one
to control free-running frequency of hor osc circuit.
Output voltage of this amplifier is compared with the reference
voltage by the comparater of pins1 to 3. When hor frequency
is high, the voltage at pin 1 becomes HIGH level. The
reference voltage of this comparater is selected so that the
comparater turns reverse when frequency is approximately
28kHz. The output of the comparater turns reverse to
become mode discriminating output, and besides it is used to
switching of circuit operation at some points in the hor
deflection circuit.
As understanding from the above formula, at pin 1, the
voltage which is proportional to frequency of hor sync
signal, is obtained.
QK11 performs the function to prevent picture bending on
screen by the increase of F/V convert voltage, because the
period of equalized pulse is seemed as twice of frequency
when composite sync including equalized pulse like NTSC
within hor sync. is input. Countermeasure to this trouble is
to eliminate trigger pulse only for ver sync period.
Operation of no signal det. circuit is as follows.
• 82kW •TC • fH (V)
1.9V
RH16+RH17
=
TC
TH
1.9V
RH16+RH17
•
RH18
•
E =
ICH01
M52346SP
14
86421
+5V
QH07
QH06
No signal
Green Video
Hor. sync
Vert. s
nc
Fig. 6
ICH01 is used in this circuit, which is explained in Mode discriminating circuit of VGA. This IC contains inside the function
which discriminates existence of hor-ver sync signal at pins 6 and 8. When the sync signal as shown in Table-3 does not exist,
logic outputs at pins 1 and 2 turn LOW to level. But, in Sync On Green method, discrimination whether sync signal is existed
or not is impossible. Therefore discriminating circuit is added by connecting QH06 to pin 14 at which hor sync signal is input.
The added circuit performs that emiter voltage turns to LOW level only when hor sync signal does not exist.
No signal situation is detected by way that these three output is set up in OR logic by diodes, collector voltage of QH07 is turned
to HIGH level.
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