SARA-G3 series - System Integration Manual
UBX-13000995 - R06 Objective Specification Design-in
Page 104 of 218
2.1.3 Interface supply (V_INT)
2.1.3.1 Guidelines for V_INT circuit design
The V_INT digital interfaces 1.8 V supply output can be mainly used to:
Pull-up DDC (I
2
C) interface signals (see section 2.5.3 for more details)
Pull-up SIM detection signal (see section 2.42.4 for more details)
Supply voltage translators to connect digital interfaces of the module to a 3.0 V device (see section
2.5.1)
Supply a 1.8 V u-blox 6 or subsequent GNSS receiver (see section 2.5.3 for more details)
Indicate when the module is switched on
Do not apply loads which might exceed the limit for maximum available current from V_INT supply,
as this can cause malfunctions in internal circuitry supplies to the same domain.
SARA-G3 series
Data Sheet
[1] describes the detailed electrical characteristics.
V_INT can only be used as an output; do not connect any external regulator on V_INT.
Since the V_INT supply is generated by an internal switching step-down regulator, the V_INT voltage
ripple can range from 15 mVpp during active-mode or connected-mode (when the switching regulator
operates in PWM mode), to 90 mVpp in idle-mode (when the switching regulator operates in PFM
mode).
It is not recommended to supply sensitive analog circuitry without adequate filtering for digital noise.
V_INT supply output pin provides internal short circuit protection to limit start-up current and protect the
device in short circuit situations. No additional external short circuit protection is required.
ESD sensitivity rating of the V_INT supply pin is 1 kV (Human Body Model according to JESD22-
A114). Higher protection level could be required if the line is externally accessible on the application
board. Higher protection level can be achieved by mounting an ESD protection (e.g. EPCOS
CA05P4S14THSG varistor array) close to accessible point.
If the V_INT supply output is not required by the customer application, since DDC (I
2
C) interface
and SIM detection functions are not used and voltage translation of digital interfaces are not needed,
the V_INT pin can be left unconnected to external components, but it is recommended providing
direct access on the application board by means of accessible testpoint directly connected to the
V_INT pin.
Formatted: English (U.S.)
To Next Page
Loading...
Need help?
General