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u-blox SARA-G3 Series - Page 149

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SARA-G3 series - System Integration Manual
UBX-13000995 - R06 Objective Specification Design-in
Page 149 of 218
stated or set low, insert a multi channel digital switch (e.g. Texas Instruments SN74CB3Q16244,
TS5A3159, or TS5A63157) between the two-circuit connections and set to high impedance during
module power down mode and during the module power-on sequence.
ESD sensitivity rating of I
2
S interface pins is 1 kV (Human Body Model according to JESD22-
A114). Higher protection level could be required if the lines are externally accessible on the
application board. Higher protection level can be achieved by mounting a general purpose ESD
protection (e.g. EPCOS CA05P4S14THSG varistor array) close to accessible points.
If the I
2
S digital audio pins are not used, they can be left unconnected on the application board.
2.6.2.2 Guidelines for digital audio layout design
The I
2
S interfaces lines (I2S_CLK, I2S_RX, I2S_TX, I2S_WA) require the same consideration regarding
electro-magnetic interference as the SIM card. Keep the traces short and avoid coupling with RF line or
sensitive analog inputs.

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