UC-00-M31 EN R1.2 Hardware Design 15
3.3 Power-on and Power-off
VCC
The VCC initial level when power-on should be less than 0.4 V.
The VCC ramp when power-on should be monotonic, without plateaus.
The voltages of undershoot and ringing should be within 5% VCC.
VCC power-on waveform: The time interval from 10% rising to 90% must be within
100 μs ~1 ms.
Power-on time interval: The time interval between the power-off (VCC < 0.4 V) to
the next power-on must be larger than 500 ms.
V_BCKP
The V_BCKP initial level when power-on should be less than 0.4 V.
The V_BCKP ramp when power-on should be monotonic, without plateaus.
The voltages of undershoot and ringing should be within 5% V_BCKP.
V_BCKP power-on waveform: The time interval from 10% rising to 90% must be
within 100 μs ~1 ms.
Power-on time interval: The time interval between the power-off (V_BCKP < 0.4 V)
to the next power-on must be larger than 500 ms.
3.4 Grounding and Heat Dissipation
Figure 3-3 Grounding and Heat Dissipation Pad (Bottom View)