L
6.3 LEFT OR RIGHT AMPLIFIER TROUBLESHOOTING SYMPTOMS
(Refer to Figure 6-2:
BLOCK DIAGRAM OF AMPLIFIER SIGNAL FLOW)
ALL VOLTAGES MEASURED WITH THE CHANNEL ON,
L OR R SELECTED
ACCORDINGLY, 1
kHz
FREQUENCY, OUTPUT LOADED.
Check for signal presence/absences at the amplifier output pin
U4 00
pin 5
-
Right
U4 01
pin 5
-
Left
This should be an undistorted
sinewave
of approximately 80
mvRMS.
Removing the earphone (load) should cause the output level to
increase significantly.
If the
signal is present here, but not at the
earphone it is
possible
that
the
phone jack is at fault or an
artwork etch
connection is missing.
Perform point-to-point connection
checks
as
necessary.
If the signal is not present
here,
check
the
amplifier input pin
U4 00
pin 3
-
Right
U401
pin 3
-
Left
This input level should be an undistorted
sinewave
of
approximately 80
mvRMS.
If the input signal is present here but
not present at the amplifier output pin then the amplifier may be
defective.
First check the amplifier enable line
U4 00
pin 1
-
Right
U401
pin 1
-
Left
for a
logic 0
(-5 Vdc). A logic 1
(+5
Vdc) disables the
amplifier
for
muting
or to conserve power.
If a
logic
0 is
present then verify that the
+5
Vdc and
-5 Vdc power supplies are
present.
If amplifier enable line and power supplies check
out
okay,
the amplifier is most likely defective.
If a logic 0 (-5 Vdc) is not present at the amplifier enable line
then check
U507
pin 16
-
Right
U507
pin 19
-
Left
for a logic 1
(+5
Vdc).
If a logic 1 is present then
U402
Right
or
U403
Left could be defective.
Check the power supply lines
accordingly.
NOTE:
The
U507
latch output may be loaded by a defective
U402
or
U403.
Remove
U402
or
U403
respectfully, then recheck the control
lines
U507
pins 16 and 19.
If these voltages are
now
correct
then
U402
or
U403
is defective.
This type of error occurs
quite
frequently with CMOS.
49
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