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Xilinx Alveo U50 Installation Guide

Xilinx Alveo U50
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8 GB HBM memory - in two 4 gigabyte (GB) HBM memory stacks
Split into 32 256 MB channels
One gigabit (Gb) quad SPI ash memory for conguraon
Ethernet networking interfaces
One QSFP28 connector supporng 100 GbE, 40 GbE, or 4x10/25 GbE
JTAG and UART access through the maintenance connector
16-lane integrated Endpoint block for PCI Express connecvity
Gen3 x16 supporng to x1, x2, x4, x8, x16 lane conguraons
Single or dual Gen4 x8
Status LEDs
I2C bus
Power management with system management bus (SMBus) voltage, current, and temperature
monitoring
75W PCIe slot power only
Note: The Alveo U50 card has separate power rails for FPGA fabric and HBM memory. Developers must
ensure their designs do not draw too much power for each rail.
Related Information
Known Issues
Minimum System Requirements
The minimum system requirements for running the Alveo
U50 Data Center accelerator cards
are listed in the following table.
Table 1: Minimum System Requirements
Component Requirement
Motherboard PCI Express
®
3.0-compliant with one x16 slot.
System Power Supply 75W
Operating System Linux, 64-bit:
Ubuntu 16.04, 18.04, 20.04
CentOS 7.4, 7.5, 7.6, 7.7, 7.8, 8.1, 8.2
RHEL 7.4, 7.5, 7.6, 7.7, 7.8, 8.1, 8.2
Chapter 1: Introduction
UG1370 (v1.7) December 9, 2020 www.xilinx.com
Alveo U50 Data Center Accelerator Card Installation Guide 7
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Xilinx Alveo U50 Specifications

General IconGeneral
BrandXilinx
ModelAlveo U50
CategoryComputer Hardware
LanguageEnglish

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