Xilinx XC4000 Series

September 18, 1996 (Version 1.04) 4-51
D
EC
Q
M
M
Q
L
rd

M
DELAY
M M
M M
Input Clock IK
I - capture
I - update
GLOBAL
S/R
FLIP-FLOP/LATCH
INVERT
S/R
Input Data 1 I1
Input Data 2 I2
X5792
PAD
V
CC
SLEW
RATE
PULL
UP
M
OUT
SEL
D
EC
Q
rd

M
M
M
INVERT
OUTPUT
M
M
INVERT
S/R
Ouput Clock OK
Clock Enable
Ouput Data O
O - update
Q - capture
O - capture
Boundary
Scan
M
EXTEST
TS - update
TS - capture
3-State TS
sd

sd

TS INV
OUTPUT
TS/OE
PULL
DOWN
INPUT
Boundary
Scan
Boundary
Scan
Figure 42: Block Diagram of XC4000E IOB with Boundary Scan (some details not shown).
XC4000EX Boundary Scan Logic is Identical.