Xilinx XC4000 Series

XC4000 Series Field Programmable Gate Arrays
4-52 September 18, 1996 (Version 1.04)
D Q
D Q
D Q
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB
M
U
X
BYPASS
REGISTER
IOB IOB
TDO
TDI
IOB IOB IOB
M
U
X
TDO
TDI
IOB
IOB
IOB
IOB
IOB
IOB
IOB IOB
IOB
IOB
IOB
IOB
IOB
IOB
IOB IOB IOB IOB IOB
1
0
1
0
1
0
1
0
1
0
1
0
1
0
DQ
LE
sd
sd
LE
DQ
DQ
DQ
1
0
1
0
1
0
1
0
DQ
LE
sd
sd
LE
DQ
sd
LE
DQ
IOB
D Q
D Q
1
0
1
0
DQ
LE
sd
sd
LE
DQ
1
0
DATA IN
IOB.T
IOB.Q
IOB.I
IOB.Q
IOB.T
IOB.I
IOB.O
SHIFT/
CAPTURE
CLOCK DATA
REGISTER
DATAOUT UPDATE EXTEST
X1523
INSTRUCTION REGISTER
INSTRUCTION REGISTER
BYPASS
REGISTER
Figure 43: XC4000-Series Boundary Scan Logic