UHF Transmit Signal Path
The adjusted speech signal from Q1040 (NJM2902V) is
delivered to UHF VCO Q1072 (2SC5006) which frequen-
cy modulates the transmitting VCO made up of D1046
(HVC375B). The modulated transmit signal passes
through buffer amplifiers Q1073, Q1074, and Q1075 (all
2SC5006). The filtered transmit signal is then applied to
the Pre-Drive amplifier Q1084 (2SK2596) and Driver am-
plifier Q1086 (RD07MVS1), then finally amplified by Pow-
er amplifier Q1087 (RD70HVF1) up to 40 Watts. This
three-stage power amplifier’s gain is controlled by the
APC circuit. The 40 Watt RF signal passes through high-
pass filter and low-pass filter networks, antenna switch
D1077 (UM9401F), and another low-pass filter network,
and then is delivered to the ANT jack.
TX APC Circuit
A portion of the power amplifier output is rectified by
D1070 and D1071 (UHF: D1078 and D1079, all
MA2S728), then delivered to APC Q1081 (NJM2904V),
as a DC voltage which is proportional to the output level
of the power amplifier. The APC Q1081 (NJM2904V) com-
pares the rectified DC voltage from the power amplifier
and the reference voltage from the main CPU Q1065
(M3826AEFGP), to produce a control voltage, which reg-
ulates supply voltage to the Pre-Drive amplifier Q1084
(2SK2596), Drive amplifier Q1086 (RD07MVS1) and
Power amplifier Q1087 (RD70HVF1), so as to maintain
stable output power under varying antenna loading con-
ditions.
Circuit Description
PTT Circuit
When the PTT switch is pressed, pin 8 of sub CPU Q2001
(M38223E) goes “high”, which send the “PTT” command
to main CPU Q1065 (M3826AEFGP). When the CPU re-
ceives the “PTT” command, it engages Q1057 (UMA8N)
and Q1058 (IMT17), which activates the Tx circuit.
PLL Circuit
A portion of the output from the VCO Q1076 (2SC5374)
and Q1072 (2SC5006), passes through the programma-
ble divider section of the PLL IC Q1070 (MB15A02PFV1),
which divides the VCO frequency according to the fre-
quency dividing data that is associated with the current
frequency input from the main CPU Q1065
(M3826AEFGP). It is then sent to the phase comparator.
The 11.15 MHz frequency of the reference oscillator cir-
cuit derived from X1002 is divided by the reference fre-
quency divider section of Q1070 (MB15A02PFV1) into
4250 or 3400 parts to become 5 kHz or 6.25 kHz compar-
ative reference frequencies, which are utilized by the phase
comparator. The phase comparator section of Q1070
(MB15A02PFV1) compares the phase between the fre-
quency-divided oscillation frequency of the VCO circuit
and the comparative frequency and its output is a pulse
corresponding to the phase difference. This pulse is inte-
grated by the charge pump and loop filter of Q1070
(MB15A02PFV1) into a control voltage (VCV) to control
the oscillation frequency of the VCOs.
D-2