Yamaha 01x - Block Diagram

HGFEDCBA
1
2
3
4
5
6
O1X
3
■ BLOCK DIAGRAM 001
28CA1-8825603-001
MAIN
CPU
8MHz
16Mbit
FLASH ROM
64Mbit
SDRAM
SEL1
SEL2
4Mbit
DRAM
4Mbit
DRAM
GATE
ARRAY
(PLLP2)
GATE
ARRAY
(REC2)
GATE
ARRAY
(CI-SUB)
DSP7
(MIXER)
DSP6
(EFFECT)
DRIVER
DRIVER
DRIVER
2 ch
Analog SW
MOTOR FADER x 9
SW
REGULATOR
SW
REGULATOR
SW
REGULATOR
REGULATOR
REGULATOR
REGULATORREGULATOR
DC/DC
CONVERTER
PA-300
AN
DM
MLN2
PN RE
MF
MIDI A
MIDI B
FOOT SWITCH
OUT
PHANTOM +48V
ON/OFF
IN
OUT IN
DC IN
AC IN
AC Adaptor
ENCODER JOG dial
KEY MATRIX
LED MATRIX
1
2
LCD
IC101 (208P)
HD6417709SF133
IC117
(48P)
IC116
(86P)
IC301 (16P)
IC306 (16P)
SEL1 and SEL2 are linked （SEL1、SEL2は連動する）
MIDI-B SCI 1
or（または）
MIDI-B MLAN_MIDI 3
SCI 1 MLAN_MIDI 5
IC210
(208P)
IC602
(208P)
IC202
(176P)
IC403
(128P)
/CS-GA15
29
30
31
/CS-GA25
/CS-GA35
IC402
(64P)
ENC[0–8]
SW/LED SCAN DATA
SC[0]–SC[7]
LED DISPLAY DATA
LED[0]–LED[14]
LCD DATA
LCD[0]–LCD[7]
MOTOR FADER DATA
FDIA[1]–FDIA[9]
FDIB[1]–FDIB[9]
FDIC[1]–FDIC[9]
FAD 1, 2
CN402, 403 CN105, 106
CN404, 401 CN101, 202CN102
CN405
FAD 3
KEY DATA
K[0]–K[12]
D0–D7
D0–D15
MD0– MD15
MD0– MD15
/MCS0
/MCS3
MD0– MD15
MD0– MD31
MD0–
MD31
/CS5
SCI1
JK304
JK303
SCI0
SCI2
/CS0, /CS3
101
166
164
155
XTAL
EXTAL
INPUT
PORT
FOOT SW IN
JK301
JK302
FOOT SW IN
INPUT
PORT
OUTPUT
PORT
98, 87
199, 201
203
FSELA, FSELB
A/D
PORT
X101
156
192
191
CN101
168
26
20
96, 99
102
8
9
/CS6
/MCS5
/MCS5
/CS-DSP7
14 22
/CS-DSP6
/MCS6
/MCS6
D0–D15
/CS-REC25
27
CN202 CN6
EC201–208
ENCODER DATA
RA[1]–RA[9], RB[1]–RB[9]
EC101
TA403,404
TA401,402
IC103–112
(9P)
IC107
(16P)
VR101–109
IC219
+5A
3
1
3
1
3
1
2
1
3
1
2
1
2
1
+12A +16A
IC218
CN502 CN201
CN503 CN202
CN201 CN101
TR501, 502
L508
IC505
IC503
IC504
IC502
IC501
2
3
5
midi port
4
1
+1.8D
+3.3D
+2.5D
+5D
+5M
+5M
SW502
STANDBY/ON
SW501
JK501
+48V
+48V
+5D
IC205
(40P)
IC208
(40P)
(See Page 5)
INPUT
PORT
OUTPUT
PORT
OUTPUT
PORT
55 x 2
DATA BUS
CH1–8
STEREO
CPU : 128MHz
BUS : 32MHz
CN101
+5M
CN501
JK101
JK102
MIC/LINE
INPUT 1
MIC/LINE
INPUT 2