Yamaha 01x - Page 35

35
O1X
TA7291S (XF557A00)
Motor Driver
MF: IC103-106, 108-112
1 2 3 4 5 6 7 8 9
IN2 I N1
Vcc
OUT2
NC
GND
VS
OUT1
Vref
8
REG
Heat
protector
6
7
3
519
2
Vcc Vref
Vs
OUT1
OUT2
IN1 IN2
GND
M
TLC2932IPWR (XV064A00)
PLL
DM: IC607
MLN2: IC002
1
2
3
4
5
6
7
LOGIC VDD
SELECT
VCO OUT
FIN-A
F
IN-B
PFD OUT
LOGIC GND
14
13
12
11
10
9
8
VCO VDD
RBIAS
VCOIN
VCO GND
VCO INHBIT
PFD INHIBIT
NC
7
LOGIC GND
4
F
IN-A
6
PFD OUT
12
V
COIN
13
R
BIAS
11
VCO GND
8
NC
1
LOGIC V
DD
5
F
IN-B
CHARGE PUMPDETECTOR
9
PFD INHIBIT
10
VCO INHBIT
14
VCO V
DD
3
VCO OUT
2
SELECT
BLAS CONTROL
VCO OUTPUT
MUX
1/2
AK4382AVT (X0661A00)
Digital to Analog Converter
AN: IC301, 302
1
2
3
4
5
6
7
16
15
14
13
12
11
DZFL
DZFR
V DD
Vss
AOUTL+
AOUTL-
AOUTR+
8
9
10
AOUTR-
MCLK
BICK
SDTI
LRCK
PDN
CSN
CCLK
CDTI
6
1
7
14
13
16
15
12
11
10
9
8
4
2
3
5
CSN
V
DD
MCLK
V
SS
DZFL
DZFR
AOUTL+
AOUTL-
AOUTR+
AOUTR-
CCLK
CDTI
µP
Interface
LRCK
BICK
SDTI
PDN
Pin No. Pin Name
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
I/O
I
I
I
I
I
I
I
I
O
O
O
O
O
O
MCLK
BICK
SDTI
LRCK
PDN
CSN
CCLK
CDTI
AOUTR-
AOUTR+
AOUTL-
AOUTL+
V
SS
VDD
DZFR
DZFL
Function
Master clock input
Audio serial data clock
Audio serial data input
L/R clock
Power down mode
Chip select
Control data input
Control data input
Rch negative analog output
Rch positive analog output
Lch negative analog output
Lch positive analog output
Ground
Power supply +5V
Rch data zero input detect
Lch data zero input detect
Note: All input pins should not be left floating.
De-emphasis
Control
Clock
Divider
8X
Interpolator
∆∑
Modulator
8X
Interpolator
∆∑
Modulator
SCF
SCF
Audio
Data
Interface
NJM4580ED (XT157A00)
NJM4556AD (XQ824A00)
Dual Operational Amplifier
AN: IC101, 102, 107-109,
IC201, 202, 207-209,
IC303-305, 307
AN: IC306
1
2
3
4-V
8
7
6
5
Output A +V
Non-Inverting
Input A
-DC Voltage Supply
+DC Voltage
Supply
Output B
Inverting
Input B
Non-Inverting
Input B
Inverting
Input A
+-
+-