Yamaha Loopfactory DX200 - DX200 Signal Flow Diagram; Tone Generator and Effect Path

13
DX200
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
PIN
NAME I/O FUNCTION
PIN
NAME I/O FUNCTION
NO. NO.
I/O
I/O
O
O
-
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
-
I
-
O
I
I
I
I
I
I
O
I
I/O
I/O
I
I
I
I
I
I
I
I
I
-
I
I
I
I
I
I
I
I
-
O
O
O
O
O
O
Channel data input
Channel data output
Ground
Address input
Data input
Initial clear
Test pin
Power supply
Clock input
Digital ground
SYWD synch. signal output
SYW synch. signal input
Write enable
Test pin
Chip enable
Test pin
Busy output
Test pin
Synch. clock output
SYW synch. signal output
NC
Ground
NC
Power supply
NC
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
O
O
-
O
O
O
O
O
O
O
O
-
O
O
O
O
O
O
O
O
-
O
O
O
O
O
O
O
O
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
I
I
I
I
I
I
-
I
I
I
I
I
I
I
I
I/O
I/O
O
O
I/O
I/O
O
O
NC
Ground
NC
Power supply
NC
Ground
NC
Power supply
NC
Ground
NC
Power supply
DRY input
DRY output
SEND input
SEND output
CHIN0
CHIN1
CHOUT0
CHOUT1
VSS
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
D0
D1
D2
D3
D4
D5
D6
D7
ICL
TSTEN
VDD
CLK
VSS
SYWD
SYWI
WEL
OBEN
CE0L
CE1
TSTEG
PBUSY
TMODE
HCLK
SYW
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
VSS
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
VDD
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
VSS
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
VDD
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
VSS
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
VDD
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
VSS
TEST
TEST
TEST
TEST
TEST
TEST
TEST
TEST
VDD
DIN0
DIN1
DOUT0
DOUT1
SIN0
SIN1
SOUT0
SOUT1
●
YMP706-F (XT329A00) FS1-AB AWM Tone Generator & Digital Filter PLG150-DX: IC8