bdiGDB for BDI2000 (PowerPC 7440/7450/86xx) User Manual 25
© Copyright 1997-2015 by ABATRON AG Switzerland V 1.13
POWERUP delay When the BDI detects target power-up, HRESET is forced immediately.
This way no code from a boot ROM is executed after power-up. The value
entered in this configuration line is the delay time in milliseconds the BDI
waits before it begins JTAG communication. This time should be longer
than the on-board reset circuit asserts HRESET.
delay the power-up start delay in milliseconds
Example: POWERUP 5000 ;start delay after power-up
RESET type [time] Normally the BDI toggles HRESET during the reset sequence. If reset type
is NONE, the BDI does not assert HRESET at all. If reset type is KEEP
then HRESET is asserted during the whole target power-up cycle to pre-
vent the execution of any maybe not present boot code.This entry can also
be used to change the default reset time.
type NONE
HARD (default)
KEEP (keep HRESET asserted during target power-up)
time The time in milliseconds the BDI assert the reset signal.
Example: RESET NONE ; no reset during startup
RESET HARD 1000 ; assert RESET for 1 second
WAKEUP time This entry in the init list allows to define a delay time (in ms) the BDI inserts
between releasing the COP-HRESET line and starting communicating
with the target. This init list entry may be necessary if COP-HRESET is de-
layed on its way to the PowerPC reset pin.
time the delay time in milliseconds
Example: WAKEUP 3000 ; insert 3sec wake-up time
*MEMDELAY clocks For slow memory it may be necessary to increase the number of clocks
used to execute a memory access cycle. If for example you cannot access
boot ROM content with the default configuration of your memory control-
ler, define additional memory access clocks.
clocks additional number of CPU clocks for a memory access
Example: MEMDELAY 2000 ; additional memory access clocks
*L3PM base size Defines the base address and size of the L3 cache private memory. Be-
cause L3 cache private memory cannot be accessed directly via JTAG,
the BDI loads some support code into the workspace and uses it to access
this memory range. Therefore a workspace is necessary to access this
memory range.
Example: L3PM 0x01000000 0x100000 ; 1MB L3 private memory
MMU XLAT [kb] In order to support Linux kernel debugging when MMU is on, the BDI
translates effective (virtual) to physical addresses. This translation is done
based on the current MMU configuration (BAT’s and page tables). If this
configuration line is present and address relocation active (MSR bits IR/
DR), the BDI translates the addresses received from GDB before it ac-
cesses physical memory. The optional parameter defines the kernel virtu-
al base address (default is 0xC0000000) and is used for default address
translation. For more information see also chapter "Embedded Linux MMU
Support". Addresses entered at the Telnet are never translated. Transla-
tion can be probed with the Telnet command PHYS.
kb The kernel virtual base address (KERNELBASE)
Example: MMU XLAT ;enable address translation