68 Chapter 4
08h Init CPU_FAR
FFh OEM BOARD_B_Init KBC8042_FAR
Init KBC8042_FAR
FFh KBC BatTest_FAR
Init KBC8042_FAR
FFh Program KBC Command Byte_FAR
Init KBC8042_FAR
0Ah Init KBC8042_FAR
Init Input Devices_FAR
0Bh Detect PS2 Mouse_FAR
Init KBC8042_FAR
0Ch Detect PS2 KeyBoard_FAR
Init KBC8042_FAR
FFh OEM BOARD_A_OEM_ReCalcCPUFreq_FAR
Init Input Devices_FAR
0Eh Init Input Devices_FAR
FFh Check Install POST INT09hHandler_FAR
Init Input Devices_FAR
13h Cp Init At EarlyPOST_FAR;
Global Device Init At Early POST_FAR
13h NB_Init At Early POST_FAR
Cp Init At Early POST_FAR
FFh NB PCIE_Init At Early POST_FAR
NB_Init At Early POST_FAR
C1h SB_Init At Early POST_FAR
Cp Init At Early POST_FAR
FFh SB_Fill Device SubVenDevID_FAR
SB_Init At Early POST_FAR
FFh SB PCIE_Init At Early POST_FAR
SB_Init At Early POST_FAR
C2h OEM_Init At Early POST_FAR
Cp Init At Early POST_FAR
FFh OEM BOARD_A_OEM_Init At Early POST_FAR
OEM_Init At Early POST_FAR
FFh EPP_Dram_Voltage
OEM_Init At Early POST_FAR
FFh CER_CHECK_S4_STATE
OEM_Init At Early POST_FAR
20h Smi Init At Early Post_FAR
Cp Init At Early POST_FAR
FFh BR04_INIT_FAR
Smi Init At Early Post_FAR
FFh far USB Port_Enable USB In Chipset
Cp Init At Early POST_FAR
FFh far USB Reserve Data Area
far USB Port_Enable USB In Chipset
POST Code (Hex) POST Routine Description
To Next Page
Loading...
